https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/99656
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@@ -0,0 +1,194 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+// These are in a separate file because errors (e.g. incompatible attributes)
currently prevent
+// the AnalysisBasedWarnings pass from running at all.
+
+// This diagnostic is re-enabled an
@@ -0,0 +1,194 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+// These are in a separate file because errors (e.g. incompatible attributes)
currently prevent
+// the AnalysisBasedWarnings pass from running at all.
+
+// This diagnostic is re-enabled an
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+
+#pragma clang diagnostic ignored "-Wperf-constraint-implies-noexcept"
+
+// Objective-C
+@interface OCClass
+- (void)method;
+@end
+
+void nl14(OCClass *oc) [[clang::nonblocking]] {
+
@@ -0,0 +1,194 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+// These are in a separate file because errors (e.g. incompatible attributes)
currently prevent
+// the AnalysisBasedWarnings pass from running at all.
+
+// This diagnostic is re-enabled an
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+
+#pragma clang diagnostic ignored "-Wperf-constraint-implies-noexcept"
+
+// Objective-C
+@interface OCClass
+- (void)method;
+@end
+
+void nl14(OCClass *oc) [[clang::nonblocking]] {
+
@@ -4699,7 +4699,7 @@ class FunctionEffect {
private:
LLVM_PREFERRED_TYPE(Kind)
- unsigned FKind : 3;
+ uint8_t FKind : 3;
jroelofs wrote:
"no functional change"
https://llvm.org/docs/Lexicon.html#n
https://github.com/llvm/llvm-project/pull/99656
__
@@ -2397,6 +2397,1262 @@ class UnsafeBufferUsageReporter : public
UnsafeBufferUsageHandler {
};
} // namespace
+//
=
+
+namespace FXAnalysis {
+
+enum class DiagnosticID : uint8_t {
+ None = 0, // s
https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/100753
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https://github.com/llvm/llvm-project/pull/101243
>From 61371af08b82e1229c34b43f56772813c2f74b1c Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 30 Jul 2024 13:56:21 -0700
Subject: [PATCH 1/4] [cmake][llvm] Limit the number of Xcode schemes created
by d
jroelofs wrote:
And you can always manually override them through the scheme editor thing, if
that is a one-off local need.
https://github.com/llvm/llvm-project/pull/101243
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>From 61371af08b82e1229c34b43f56772813c2f74b1c Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 30 Jul 2024 13:56:21 -0700
Subject: [PATCH 1/5] [cmake][llvm] Limit the number of Xcode schemes created
by d
jroelofs wrote:
neat idea. that's doable.
https://github.com/llvm/llvm-project/pull/101243
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>From 61371af08b82e1229c34b43f56772813c2f74b1c Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 30 Jul 2024 13:56:21 -0700
Subject: [PATCH 1/6] [cmake][llvm] Limit the number of Xcode schemes created
by d
https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/101243
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@@ -1423,3 +1423,11 @@ endif()
if (LLVM_INCLUDE_UTILS AND LLVM_INCLUDE_TOOLS)
add_subdirectory(utils/llvm-locstats)
endif()
+
+if (XCODE)
+ set(LLVM_XCODE_EXTRA_TARGET_SCHEMES "" CACHE STRING "Specifies an extra list
of targets to turn into schemes")
jroelo
https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/101243
>From 61371af08b82e1229c34b43f56772813c2f74b1c Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 30 Jul 2024 13:56:21 -0700
Subject: [PATCH 1/7] [cmake][llvm] Limit the number of Xcode schemes created
by d
https://github.com/jroelofs closed
https://github.com/llvm/llvm-project/pull/101243
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https://github.com/jroelofs created
https://github.com/llvm/llvm-project/pull/99365
Whenever these tests change, it's difficult to see why they don't match, and
the diff after you've fixed them isn't easy to grok. By splitting them with a
sed pipe, we fix both issues simultaneously.
>From 91
@@ -0,0 +1,106 @@
+; RUN: llc -mtriple arm64e-apple-darwin \
jroelofs wrote:
does update_test_checks do horrible things to the CHECK lines in this?
https://github.com/llvm/llvm-project/pull/97647
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Strong support for this from me. Thanks!
https://github.com/llvm/llvm-project/pull/99522
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jroelofs wrote:
This broke the aix-ppc64 bot:
https://lab.llvm.org/buildbot/#/builders/64/builds/335
Must have a different version of `sed` than I do :(
https://github.com/llvm/llvm-project/pull/99365
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Author: Jon Roelofs
Date: 2024-07-18T13:25:23-07:00
New Revision: 05275b05ca58e4d015eea1503f120e6967ef1b91
URL:
https://github.com/llvm/llvm-project/commit/05275b05ca58e4d015eea1503f120e6967ef1b91
DIFF:
https://github.com/llvm/llvm-project/commit/05275b05ca58e4d015eea1503f120e6967ef1b91.diff
L
Author: Jon Roelofs
Date: 2024-07-18T13:48:17-07:00
New Revision: 06518cea3905556d8d1eea4088132ebb234bfdab
URL:
https://github.com/llvm/llvm-project/commit/06518cea3905556d8d1eea4088132ebb234bfdab
DIFF:
https://github.com/llvm/llvm-project/commit/06518cea3905556d8d1eea4088132ebb234bfdab.diff
L
Author: Jon Roelofs
Date: 2024-07-18T14:48:11-07:00
New Revision: 6c6baf019a25710cdc3c3971b09cd6332d0379c0
URL:
https://github.com/llvm/llvm-project/commit/6c6baf019a25710cdc3c3971b09cd6332d0379c0
DIFF:
https://github.com/llvm/llvm-project/commit/6c6baf019a25710cdc3c3971b09cd6332d0379c0.diff
L
jroelofs wrote:
I think you also need:
```
diff --git a/llvm/lib/Target/AArch64/AArch64FMV.td
b/llvm/lib/Target/AArch64/AArch64FMV.td
index 7a40c83b2bb2..8f42ece439a7 100644
--- a/llvm/lib/Target/AArch64/AArch64FMV.td
+++ b/llvm/lib/Target/AArch64/AArch64FMV.td
@@ -75,7 +75,7 @@ def : FMVExtensi
https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/84704
>From b352a41e1788819afbb15a5b6d79cbf2968dc5dc Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Sun, 10 Mar 2024 16:46:50 -0700
Subject: [PATCH 1/3] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on
arm64e
@@ -2085,6 +2099,37 @@ void
AArch64AsmPrinter::emitMachOIFuncStubHelperBody(Module &M,
.addImm(2),
*STI);
+ if (TM.getTargetTriple().isArm64e()) {
+// autibsp
jroelofs wrote:
https://gi
https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/101712
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https://github.com/llvm/llvm-project/pull/106312
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jroelofs wrote:
If the diagnostics are downstream-only, does this really need go upstream?
https://github.com/llvm/llvm-project/pull/98091
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@@ -0,0 +1,23 @@
+// REQUIRES: aarch64-registered-target
jroelofs wrote:
Is this a new folder? There should be a `lit.local.cfg` in there that takes
care of this:
```
if "AArch64" not in config.root.targets:
config.unsupported = True
```
If not, please add
https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/98097
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https://github.com/llvm/llvm-project/pull/98267
>From 2ca4c255338f1c41a2cad929604c70febf6c7eaf Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 9 Jul 2024 19:47:27 -0700
Subject: [PATCH 1/4] [llvm][AArch64] apple-m4 is armv9.2-a
But since SVE and friend
@@ -797,7 +797,7 @@ def HasV8_9aOps : Architecture64<8, 9, "a", "v8.9a",
!listconcat(HasV8_8aOps.DefaultExts, [FeatureSPECRES2, FeatureCSSC,
FeatureRASv2])>;
def HasV9_0aOps : Architecture64<9, 0, "a", "v9a",
- [HasV8_5aOps, FeatureMEC],
jroelofs wrote:
https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/98267
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https://github.com/llvm/llvm-project/pull/98267
>From 2ca4c255338f1c41a2cad929604c70febf6c7eaf Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 9 Jul 2024 19:47:27 -0700
Subject: [PATCH 1/5] [llvm][AArch64] apple-m4 is armv9.2-a
But since SVE and friend
https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/98267
>From 2ca4c255338f1c41a2cad929604c70febf6c7eaf Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 9 Jul 2024 19:47:27 -0700
Subject: [PATCH 1/5] [llvm][AArch64] apple-m4 is armv9.2-a
But since SVE and friend
@@ -161,14 +161,10 @@ struct CpuInfo {
StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch;
AArch64::ExtensionBitset
- DefaultExtensions; // Default extensions for this CPU. These will be
- // ORd with the architecture defaults
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@@ -161,14 +161,10 @@ struct CpuInfo {
StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch;
AArch64::ExtensionBitset
- DefaultExtensions; // Default extensions for this CPU. These will be
- // ORd with the architecture defaults
@@ -161,14 +161,10 @@ struct CpuInfo {
StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch;
AArch64::ExtensionBitset
- DefaultExtensions; // Default extensions for this CPU. These will be
- // ORd with the architecture defaults
https://github.com/jroelofs commented:
lgtm
https://github.com/llvm/llvm-project/pull/98550
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@@ -161,14 +161,10 @@ struct CpuInfo {
StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch;
AArch64::ExtensionBitset
- DefaultExtensions; // Default extensions for this CPU. These will be
- // ORd with the architecture defaults
jroelofs wrote:
This one looks fairly benign, and while I agree that it is good to upstream
things wherever possible, my slight objection rests mostly on two principles:
* In general the community doesn't take behavior-changing patches purely on the
basis of eliminating merge conflicts for cod
https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/98698
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jroelofs wrote:
I am mildly opposed to this on principle: we should be able to optimize for any
feature present in the supplied `-mcpu=`, and accommodating features like this
that have a "graceful" fallback sets a bad precedent. If someone wants to run
code on a machine, they should set mcpu/m
@@ -1,4 +1,4 @@
-REQUIRES: shell
+REQUIRES: perl
jroelofs wrote:
should be:
```
REQUIRES: perl, shell
```
right?
https://github.com/llvm/llvm-project/pull/91275
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@@ -1,4 +1,4 @@
-REQUIRES: shell
+REQUIRES: perl
jroelofs wrote:
(the rest of them seem fine though)
https://github.com/llvm/llvm-project/pull/91275
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@@ -0,0 +1,381 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-attributes --check-globals all --filter "define|attributes"
--include-generated-funcs --version 4
+
+// Test/document all of the dependencies between possible AArch
@@ -0,0 +1,381 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-attributes --check-globals all --filter "define|attributes"
--include-generated-funcs --version 4
+
+// Test/document all of the dependencies between possible AArch
@@ -0,0 +1,25 @@
+// Test which driver flags enable/disable Function Multiversioning on aarch64.
+
+// FMV is enabled for non-android aarch64 targets:
+// RUN: %clang --target=aarch64 --rtlib=compiler-rt -### -c %s 2>&1 |
FileCheck -check-prefix=FMV-ENABLED %s
+// RUN: %clang --t
https://github.com/jroelofs approved this pull request.
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https://github.com/llvm/llvm-project/pull/90987
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@@ -108,6 +111,101 @@ static void EmitARMTargetDef(RecordKeeper &RK,
raw_ostream &OS) {
<< "#undef EMIT_EXTENSIONS\n"
<< "#endif // EMIT_EXTENSIONS\n"
<< "\n";
+
+ // Emit architecture information
+ OS << "#ifdef EMIT_ARCHITECTURES\n";
+
+ // Return the C++ n
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ //
@@ -618,187 +618,210 @@ def TuneAmpere1B : SubtargetFeature<"ampere1b",
"ARMProcFamily", "Ampere1B",
def ProcessorFeatures {
- list A53 = [HasV8_0aOps, FeatureCRC, FeatureCrypto,
+ list A53 = [HasV8_0aOps, FeatureCRC, FeatureSHA2,
FeatureAES,
@@ -812,178 +835,192 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef
+> : ProcessorModel {
+ // The base architecture for th
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ //
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ //
https://github.com/jroelofs approved this pull request.
Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My mistake.
https://github.com/llvm/llvm-project/pull/92600
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https://github.com/llvm/llvm-project/pull/93044
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@@ -2397,6 +2397,1262 @@ class UnsafeBufferUsageReporter : public
UnsafeBufferUsageHandler {
};
} // namespace
+//
=
+
+namespace FXAnalysis {
+
+enum class DiagnosticID : uint8_t {
+ None = 0, // s
@@ -2397,6 +2397,1262 @@ class UnsafeBufferUsageReporter : public
UnsafeBufferUsageHandler {
};
} // namespace
+//
=
+
+namespace FXAnalysis {
+
+enum class DiagnosticID : uint8_t {
+ None = 0, // s
@@ -0,0 +1,194 @@
+// RUN: %clang_cc1 -fsyntax-only -fblocks -fcxx-exceptions -verify %s
+// These are in a separate file because errors (e.g. incompatible attributes)
currently prevent
+// the AnalysisBasedWarnings pass from running at all.
+
+// This diagnostic is re-enabled an
jroelofs wrote:
That's annoying. You can always put the diff from this thing's comment on your
clipboard, and then do `pbpaste | patch -p1` from the top-level source dir.
https://github.com/llvm/llvm-project/pull/99656#issuecomment-2241192368
https://github.com/llvm/llvm-project/pull/99656
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https://github.com/llvm/llvm-project/pull/96249
>From ee1389a36aac9eecf00513d98cc99787b2cfe17a Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Thu, 20 Jun 2024 16:26:45 -0700
Subject: [PATCH 1/3] [llvm][AArch64][TableGen] Create a ProcessorAlias record.
NFC
https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/96249
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https://github.com/llvm/llvm-project/pull/96249
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jroelofs wrote:
> Can all the cpu aliases work in the same way? Or do you want them to work
> different, where they are not just frontend aliases?
I hadn't noticed that mechanism. There were some holes that needed to be
addressed, but after fixing them, this does look like a better way to hand
@@ -1130,7 +1130,8 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_MTE, AArch64::AEK_SSBS,
AArch64::AEK_FP16,AArch64::AEK_FP16FML,
AArch64::AEK_SB, AArch64::AEK_JSCVT,
- AArch64::AEK_FCMA,
Author: Jon Roelofs
Date: 2024-06-24T15:35:53-07:00
New Revision: b3c668b0055717633503ed26787037d9e3499781
URL:
https://github.com/llvm/llvm-project/commit/b3c668b0055717633503ed26787037d9e3499781
DIFF:
https://github.com/llvm/llvm-project/commit/b3c668b0055717633503ed26787037d9e3499781.diff
L
jroelofs wrote:
Looks like the new tests in `Driver` are missing `// REQUIRES:
aarch64-registered-target`
https://github.com/llvm/llvm-project/pull/95805
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@@ -21,7 +21,7 @@
// RUN: %clang --target=aarch64 -march=armv8a+fp16fml -### -c %s 2>&1 |
FileCheck -check-prefix=GENERICV8A-FP16FML %s
jroelofs wrote:
needs a `// REQUIRES: aarch64-registered-target`. Ditto for all the rest of the
`aarch64-*` files being mo
@@ -315,37 +315,37 @@
// RUN: %clang -target aarch64 -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck
-check-prefix=CHECK-MCPU-THUNDERX2T99 %s
// RUN: %clang -target aarch64 -mcpu=a64fx -### -c %s 2>&1 | FileCheck
-check-prefix=CHECK-MCPU-A64FX %s
// RUN: %clang -target aarch64
@@ -21,7 +21,7 @@
// RUN: %clang --target=aarch64 -march=armv8a+fp16fml -### -c %s 2>&1 |
FileCheck -check-prefix=GENERICV8A-FP16FML %s
jroelofs wrote:
oh, ok. TIL.
https://github.com/llvm/llvm-project/pull/96795
_
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@@ -88,10 +88,14 @@ StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
void AArch64::fillValidCPUArchList(SmallVectorImpl &Values) {
for (const auto &C : CpuInfos)
- Values.push_back(C.Name);
+Values.push_back(C.Name);
for (const auto &Alias : CpuAliases
@@ -304,8 +304,21 @@ struct Alias {
StringRef Name;
};
-inline constexpr Alias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
- {"grace", "neoverse-v2"}};
+inline constexpr Alias CpuAliases[] = {
+{"cobalt-100", "neoverse-n2"},
+
@@ -304,8 +304,21 @@ struct Alias {
StringRef Name;
};
-inline constexpr Alias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
- {"grace", "neoverse-v2"}};
+inline constexpr Alias CpuAliases[] = {
jroelofs wrote:
Since I
@@ -5,11 +5,11 @@
// RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s
2>&1 | FileCheck %s --check-prefix AARCH64
// AARCH64: error: unknown target CPU 'not-a-cpu'
-// AARCH64-NEXT: note: valid target CPU values are: generic, cortex-a35,
cortex-a34,
https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/96249
>From ee1389a36aac9eecf00513d98cc99787b2cfe17a Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Thu, 20 Jun 2024 16:26:45 -0700
Subject: [PATCH 1/4] [llvm][AArch64][TableGen] Create a ProcessorAlias record.
NFC
https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/96249
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https://github.com/jroelofs edited
https://github.com/llvm/llvm-project/pull/96249
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https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/96249
>From ee1389a36aac9eecf00513d98cc99787b2cfe17a Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Thu, 20 Jun 2024 16:26:45 -0700
Subject: [PATCH 1/5] [llvm][AArch64][TableGen] Create a ProcessorAlias record.
NFC
https://github.com/jroelofs closed
https://github.com/llvm/llvm-project/pull/96249
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Author: Jon Roelofs
Date: 2024-09-11T13:37:45-07:00
New Revision: b3f3c0c63358b412348022d10308b97332d02bcd
URL:
https://github.com/llvm/llvm-project/commit/b3f3c0c63358b412348022d10308b97332d02bcd
DIFF:
https://github.com/llvm/llvm-project/commit/b3f3c0c63358b412348022d10308b97332d02bcd.diff
L
@@ -73,8 +73,6 @@ enum CPUFeatures {
FEAT_SSBS,
FEAT_SSBS2,
FEAT_BTI,
- FEAT_LS64,
- FEAT_LS64_V,
jroelofs wrote:
https://github.com/llvm/llvm-project/pull/88965#discussion_r1567997481
https://github.com/llvm/llvm-project/pull/108024
_
@@ -73,8 +73,6 @@ enum CPUFeatures {
FEAT_SSBS,
FEAT_SSBS2,
FEAT_BTI,
- FEAT_LS64,
- FEAT_LS64_V,
jroelofs wrote:
https://github.com/llvm/llvm-project/pull/88965#discussion_r1567997481
> Did any implementation ship __aarch64_cpu_features in a way that
https://github.com/jroelofs deleted
https://github.com/llvm/llvm-project/pull/108024
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@@ -33,7 +33,6 @@ enum CPUFeatures {
FEAT_FP,
FEAT_SIMD,
FEAT_CRC,
- FEAT_SHA1,
jroelofs wrote:
Here are the other threads:
https://github.com/llvm/llvm-project/pull/108024#discussion_r1757249346
https://github.com/llvm/llvm-project/pull/88965#discussio
@@ -73,8 +73,6 @@ enum CPUFeatures {
FEAT_SSBS,
FEAT_SSBS2,
FEAT_BTI,
- FEAT_LS64,
- FEAT_LS64_V,
jroelofs wrote:
We could do that automatically every release by putting the version number in
its name.
https://github.com/llvm/llvm-project/pull/108024
https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/110297
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jroelofs wrote:
> However these instructions only work at Exception Level 1, so they would be
> unusable since FMV is a user space facility.
I don't understand this distinction: why is FMV seen as user-space only?
https://github.com/llvm/llvm-project/pull/112511
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https://github.com/jroelofs approved this pull request.
https://github.com/llvm/llvm-project/pull/112511
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jroelofs wrote:
Are you also planning to do the feature test macros, e.g. `__ARM_FEATURE_FP8`?
https://github.com/llvm/llvm-project/pull/100608
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