[PATCH] D79770: [RISCV] Fix passing two floating-point values in complex separately by two GPRs on RV64

Jim created this revision. Jim added reviewers: asb, luismarques, lenary. Herald added subscribers: cfe-commits, evandro, apazos, sameer.abuasal, pzheng, s.egerton, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-che

[PATCH] D79770: [RISCV] Fix passing two floating-point values in complex separately by two GPRs on RV64

This revision was automatically updated to reflect the committed changes. Closed by commit rG7ee479a760e0: [RISCV] Fix passing two floating-point values in complex separately by two GPRs… (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.or

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. ping? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D95590: [RISCV] Define preprocessor definitions for 'P' extension

Jim updated this revision to Diff 361087. Jim added a comment. Recover it. Split preprocessor definitions part of D95588 to this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95590/new/ https://reviews.llvm.org/D

[PATCH] D95589: [RISCV] Support experimental 'P' extension 0.9

Jim updated this revision to Diff 361088. Jim added a comment. Recover it. Split arch version for P extension of D95588 to this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95589/new/ https://reviews.llvm.org/D9

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. In D95588#2898470 , @jrtc27 wrote: > Oh, technically none of the clang changes belong in this patch. Those are for > the Clang driver and preprocessor, not the MC layer which is purely llvm. I move the clang changes to D95589

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim marked 8 inline comments as done. Jim added inline comments. Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:442 + +if (STI.getFeatureBits()[RISCV::FeatureExtZpsfoperand] && +!STI.getFeatureBits()[RISCV::Feature64Bit]) { jrtc2

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. @jrtc27 Any more feedback? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org ht

[PATCH] D93298: [RISCV] add the MC layer support of Zfinx extension

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:555 +def GPRF64 : RegisterClass<"RISCV", [f64], 64, (add GPR)>; +def GPRPF64 : RegisterClass<"RISCV", [f64], 64, (add +X10_PD, X12_PD, X14_PD, X16_PD, Is XLenRI correct for GPR

[PATCH] D93298: [RISCV] add the MC layer support of Zfinx extension

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:557 + +let RegInfos = RegInfoByHwMode<[RV64], [RegInfo<64, 64, 64>]> in +def GPRPF64 : RegisterClass<"RISCV", [f64], 64, (add Is register pair only on RV32 for used as f64? Reposi

[PATCH] D108189: [RISCV] Support experimental 'P' extension 0.96

Jim updated this revision to Diff 407770. Jim added a comment. Herald added a subscriber: pcwang-thead. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108189/new/ https://reviews.llvm.org/D108189 Files: clang/test/Driver/riscv-arch.c cla

[PATCH] D128604: [RISCV] Support Zbpbo extension v0.9.11

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:471 + Sched<[WriteCMix, ReadCMix, ReadCMix, ReadCMix]>; def FSR : RVBTernaryR<0b10, 0b101, OPC_OP, "fsr", "$rd, $rs1, $rs3, $rs2">, Sched<[WriteFSReg, ReadFSReg, ReadFSReg, Re

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. In D95588#3622052 , @sunshaoce wrote: > Hello @Jim! We are developing the P extension, are you still maintaining this > patch? Or would you mind co-development together? Yes, I am still on developing the P extension. But it seems spe

[PATCH] D71982: [docs] Update path to clang-tools-extra

Jim added a comment. There shows "Context not available". Could you update for this? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71982/new/ https://reviews.llvm.org/D71982 ___ cfe-commits mailing lis

[PATCH] D71982: [docs] Update path to clang-tools-extra

Jim added inline comments. Comment at: clang-tools-extra/docs/clang-tidy/Contributing.rst:66 -Once you are done, change to the ``llvm/tools/clang/tools/extra`` directory, and +Once you are done, change to the ``llvm/clang-tools-extra`` directory, and let's start!

[PATCH] D72014: [PowerPC]: Add powerpcspe target triple subarch component

Jim added a comment. Could you add tests in llvm/unittests/ADT/TripleTest.cpp Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72014/new/ https://reviews.llvm.org/D72014 ___ cfe-commits mailing list cfe-c

[PATCH] D71982: [docs] Update path to clang-tools-extra

Jim added a comment. @AlexanderLanin git commit --amend --author="What-is-your-name " ? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71982/new/ https://reviews.llvm.org/D71982 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:/

[PATCH] D71982: [docs] Update path to clang-tools-extra

This revision was automatically updated to reflect the committed changes. Closed by commit rG8188c998ffa4: [docs] Update path to clang-tools-extra (authored by AlexanderLanin, committed by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71982/new

[PATCH] D72320: [NFC] Use isX86() instead of getArch()

Jim created this revision. Jim added reviewers: MaskRay, craig.topper. Herald added subscribers: llvm-commits, cfe-commits, rupprecht, hiraditya. Herald added a reviewer: jhenderson. Herald added projects: clang, LLVM. This is a clean up for https://reviews.llvm.org/D72247. Repository: rG LLVM

[PATCH] D72320: [NFC] Use isX86() instead of getArch()

This revision was automatically updated to reflect the committed changes. Closed by commit rGab1bcda851d9: [NFC] Use isX86() instead of getArch() (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72320/new/ https://reviews.llvm.org/D7

[PATCH] D72434: Support offset of member designator with the arrow for __builtin_offsetof

Jim created this revision. Jim added a reviewer: eli.friedman. Herald added a project: clang. Herald added a subscriber: cfe-commits. Push array index 0 into offsets to support offset of member designator x->b. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D72434 Files: clan

[PATCH] D72825: [NFC] Fix options name typo

Jim created this revision. Jim added reviewers: efriedma, MaskRay. Herald added a project: clang. Herald added a subscriber: cfe-commits. Jim edited the summary of this revision. 1. -ftree_loop_im -> -ftree-loop-im 2. -ftree_loop_ivcanon -> -ftree-loop-ivcanon 3. -ftree_loop_linear -> -ftree-loop-

[PATCH] D95589: [RISCV] Support experimental 'P' extension 0.9

Jim created this revision. Jim added reviewers: craig.topper, HsiangKai, jrtc27, kito-cheng, luismarques. Herald added subscribers: frasercrmck, NickHung, evandro, apazos, sameer.abuasal, pzheng, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zz

[PATCH] D95590: [RISCV] Define preprocessor definitions for 'P' extension

Jim created this revision. Jim added reviewers: craig.topper, HsiangKai, kito-cheng, jrtc27, luismarques. Herald added subscribers: frasercrmck, NickHung, evandro, apazos, sameer.abuasal, pzheng, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zz

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

Jim added inline comments. Comment at: clang/test/CodeGen/RISCV/vadd.c:22 +{ +return __builtin_rvv_vadd_vv_i8m1_vl(arg_0, arg_1, arg_2); +} Is it necessary with prefix "__builtin_"? Refer to https://github.com/riscv/rvv-intrinsic-doc/blob/master/rvv_intrinsi

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Any feedback? I think this patch is good enough to be accepted. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. In D95588#3003090 , @Jim wrote: > Any feedback? I think this patch is good enough to be accepted. Ping? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim marked 7 inline comments as done. Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoP.td:909 + +// kmar64 has a aliased instruction kmada32 belong to zpn sub-extension on RV64. +let DecoderNamespace = "RISCV32Zpsfoperand_", jrtc27 wr

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

Jim added inline comments. Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:11127 +def err_riscvv_builtin_not_useable : Error< + "builtin requires 'V' extension support to be enabled">; } // end of sema component. Add blank line. Is it "err_riscvv_

[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.

Jim added inline comments. Comment at: clang/include/clang/Basic/BuiltinsRISCV.def:2 -RISCVV_BUILTIN(vadd_vv_i8m1_vl, "q8Scq8Scq8Scz", "n") -RISCVV_BUILTIN(vadd_vv_i8m1_m_vl, "q8Scq8bq8Scq8Scq8Scz", "n") -RISCVV_BUILTIN(vadd_vv_i16m1_vl, "q4Ssq4Ssq4Ssz", "n") -RISCVV_BUILTIN(va

[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.

Jim added inline comments. Comment at: llvm/docs/CommandGuide/tblgen.rst:141 - Generate RISCV compressed instructions. + Generate RISC-V compressed instructions. It is typo fix. Could you fix it in a separate patch? Repository: rG LLVM Github Monorepo

[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.

Jim added inline comments. Comment at: clang/include/clang/Basic/BuiltinsRISCV.def:2 -RISCVV_BUILTIN(vadd_vv_i8m1_vl, "q8Scq8Scq8Scz", "n") -RISCVV_BUILTIN(vadd_vv_i8m1_m_vl, "q8Scq8bq8Scq8Scq8Scz", "n") -RISCVV_BUILTIN(vadd_vv_i16m1_vl, "q4Ssq4Ssq4Ssz", "n") -RISCVV_BUILTIN(va

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

Jim added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:89 +#define BUILTIN(ID, TYPE, ATTRS) \ + {"__builtin_rvv_" #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, +#include "clang/Basic/BuiltinsRISCV.def" --

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

Jim added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:89 +#define BUILTIN(ID, TYPE, ATTRS) \ + {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, +#include "clang/Basic/BuiltinsRISCV.def" Should

[PATCH] D103313: [RISCV][Clang] Implement support for zmmul-experimental

Jim added a comment. It should add arch string tests such as in clang/test/Driver/riscv-arch.c. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103313/new/ https://reviews.llvm.org/D103313 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Any comments? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.l

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. ping? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D107248: [RISCV] Define preprocessor definitions for 'P' extension

Jim created this revision. Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso,

[PATCH] D95590: [RISCV] Define preprocessor definitions for 'P' extension

Jim updated this revision to Diff 363371. Jim added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95590/new/ https://reviews.llvm.org/D95590 Files: clang/lib/Basic/Targets/RISCV.cpp clang/lib/Basic/Targets/RISCV.h clang/tes

[PATCH] D95589: [RISCV] Support experimental 'P' extension 0.9

Jim updated this revision to Diff 363372. Jim added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95589/new/ https://reviews.llvm.org/D95589 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp clang/test/Driver/riscv-arch.c In

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Kindly ping? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.ll

[PATCH] D95590: [RISCV] Define preprocessor definitions for 'P' extension

Jim updated this revision to Diff 365358. Jim added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95590/new/ https://reviews.llvm.org/D95590 Files: clang/lib/Basic/Targets/RISCV.cpp clang/lib/Basic/Targets/RISCV.h clang/tes

[PATCH] D95589: [RISCV] Support experimental 'P' extension 0.9

Jim updated this revision to Diff 365359. Jim added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95589/new/ https://reviews.llvm.org/D95589 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp clang/test/Driver/riscv-arch.c In

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Hi @jrtc27, any further feedback? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim marked an inline comment as done. Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCV.td:186-188 + [FeatureExtZpsfoperand, +FeatureExtZpn, +FeatureExtZprvsfextra]>; jrtc27 wr

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Any comments? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.l

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added a comment. Ping? Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95588/new/ https://reviews.llvm.org/D95588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:69 +def sub_lo : SubRegIndex<32>; +def sub_hi : SubRegIndex<32, 32>; luismarques wrote: > jrtc27 wrote: > > This assumes RV32, and is not clear it applies to register pairs > What

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:69 +def sub_lo : SubRegIndex<32>; +def sub_hi : SubRegIndex<32, 32>; Jim wrote: > luismarques wrote: > > jrtc27 wrote: > > > This assumes RV32, and is not clear it applies to regi

[PATCH] D97916: [Driver][RISCV] Support parsing multi-lib config from GCC.

Jim added inline comments. Comment at: clang/lib/Driver/ToolChains/Gnu.cpp:1703 +} + } + Ms.emplace_back(Multilib); Do you have plan to support other kind of options to build multilib? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D97916: [Driver][RISCV] Support parsing multi-lib config from GCC.

Jim added inline comments. Comment at: clang/lib/Driver/ToolChains/Gnu.cpp:1744 + // which multi-lib should be used. + return ScanGCCMultilibConfig(D, TargetTriple, Path, Args, MultilibOutput, + Result); scanGCCMultilibConfig ? R

[PATCH] D108189: [RISCV] Support experimental 'P' extension 0.96

Jim updated this revision to Diff 433612. Jim added a comment. Herald added subscribers: sunshaoce, StephenFan, arichardson. Herald added a project: All. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108189/new/ https://reviews.llvm.org/D108

[PATCH] D156507: [RISCV] Upgrade Zihintntl extension to version 1.0 and move out of experimental state.

Jim created this revision. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, jdoerfert, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, s

[PATCH] D158259: [clang][RISCV] Support operators for RVV sizeless vector types

Jim added inline comments. Comment at: clang/test/CodeGen/riscv-rvv-vla-arith-ops.c:3 +// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +zve64d \ +// RUN: -target-feature +f -target-feature +d -disable-O0-optnone \ +// RUN: -mvscale-min=4 -mvscale-max=4 -emit-llv

[PATCH] D158402: [Clang][RISCV] Add vcreate intrinsics for RVV tuple types

Jim added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:2833 } + let Name = "vcreate_v", + UnMaskedPolicyScheme = NonePolicy, Can we add a blank line before this. Comment at: clang/include/clang/Basic/riscv_vec

[PATCH] D158259: [clang][RISCV] Support operators for RVV sizeless vector types

Jim added inline comments. Comment at: clang/test/CodeGen/riscv-rvv-vla-arith-ops.c:3 +// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +zve64d \ +// RUN: -target-feature +f -target-feature +d -disable-O0-optnone \ +// RUN: -mvscale-min=4 -mvscale-max=4 -emit-llv

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

Jim created this revision. Herald added subscribers: ctetreau, s.egerton, simoncook. Herald added a project: All. Jim requested review of this revision. Herald added subscribers: cfe-commits, wangpc. Herald added a project: clang. Reuse isSVESizelessBuiltinType() and isRVVSizelessBuiltinType().

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

Jim updated this revision to Diff 545921. Jim added a comment. Address comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156686/new/ https://reviews.llvm.org/D156686 Files: clang/lib/AST/Type.cpp Index: clang/lib/AST/Type.cpp

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

This revision was automatically updated to reflect the committed changes. Closed by commit rG1c1066797c5b: [AST] Simplify Type::isSizelessBuiltinType(). NFC. (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156686/new/ https://review

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:33 +let Uses = [SSP] in { +let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in +class RV_SSPop _rd, bits<5> _rs1, string opcodestr, string argstr> : Two `let` lines can be merg

[PATCH] D157353: [RISCV] Remove pre-defined macro test for b extension. NFC.

Jim created this revision. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, si

[PATCH] D157353: [RISCV] Remove pre-defined macro test for b extension. NFC.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG767ca3a70d6d: [RISCV] Remove pre-defined macro test for b extension. NFC. (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[PATCH] D154596: [RISCV] Fix required features checking with empty string

Jim created this revision. Herald added subscribers: jobnoorman, VincentWu, vkmr, luismarques, sameer.abuasal, s.egerton, benna, psnobl, PkmX, rogfer01, shiva0217, kito-cheng, simoncook, arichardson. Herald added a project: All. Jim requested review of this revision. Herald added subscribers: cfe

[PATCH] D154596: [RISCV] Fix required features checking with empty string

Jim added a comment. Kindly ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154596/new/ https://reviews.llvm.org/D154596 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org

[PATCH] D154596: [RISCV] Fix required features checking with empty string

Jim added a comment. In D154596#4499647 , @wangpc wrote: > Can you give an example of intrinsic that doesn't require any extra extension > enabled? Like read/write csr intrinsics that we add for convenient usage doesn't need any extra extension enabled

[PATCH] D154596: [RISCV] Fix required features checking with empty string

Jim added a comment. In D154596#4499757 , @wangpc wrote: > In D154596#4499718 , @Jim wrote: > >> In D154596#4499647 , @wangpc wrote: >> >>> Can you give an example of intr

[PATCH] D154596: [RISCV] Fix required features checking with empty string

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG8fe0449ac990: [RISCV] Fix required features checking with empty string (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D72825: Remove unused option that gcc ignored

This revision was automatically updated to reflect the committed changes. Closed by commit rGea789f819f26: Remove unused option that gcc ignored (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72825/new/ https://reviews.llvm.org/D72

[PATCH] D71049: Remove implicit conversion that promotes half to other larger precision types for fp classification builtins

Jim created this revision. Jim added a reviewer: aaron.ballman. Herald added a project: clang. Herald added a subscriber: cfe-commits. It shouldn't promote half to double or any larger precision types for fp classification builtins. Because fp classification builtins would get incorrect result wi

[PATCH] D71049: Remove implicit conversion that promotes half to other larger precision types for fp classification builtins

Jim updated this revision to Diff 232765. Jim added a comment. Thank you for review. Update patch and add tests that test half value will not be promoted to double. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71049/new/ https://reviews.llvm.org/D

[PATCH] D71124: [RISCV] support clang driver to select cpu

Jim added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.h:46 + bool setCPU(const std::string &Name) override { +CPU = Name; I think this should test cpu name is valid first. And assign Name to CPU, if it is valid. Repository: rC Clang CH

[PATCH] D71049: Remove implicit conversion that promotes half to other larger precision types for fp classification builtins

This revision was automatically updated to reflect the committed changes. Closed by commit rGcefac9dfaac9: Remove implicit conversion that promotes half to other larger precision types… (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/

[PATCH] D71049: Remove implicit conversion that promotes half to other larger precision types for fp classification builtins

Jim added a comment. @uweigand This is fixed by https://reviews.llvm.org/rG9c3966379813c198129c57aa3ebecd68d6af1ebd Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71049/new/ https://reviews.llvm.org/D71049 ___

[PATCH] D48921: NFC - Typo fix in test/CodeGenCXX/runtime-dllstorage.cpp

Jim accepted this revision. Jim added a comment. This revision is now accepted and ready to land. Herald added a project: clang. Are you ready to land this patch? Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D48921/new/ https://reviews.llvm.org/D48921

[PATCH] D71374: Improve support of GNU mempcpy

Jim added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:2524 +else + return RValue::get(Builder.CreateGEP(Dest.getPointer(), SizeVal)); } Is it an error here? It should be: ``` if (BuiltinID == Builtin::BImempcpy || BuiltinID == B

[PATCH] D57732: Correct inf typo

Jim added a comment. Do you need someone to commit this change for you? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57732/new/ https://reviews.llvm.org/D57732 ___ cfe-commits mailing list cfe-commits

[PATCH] D57732: Correct inf typo

Jim added a comment. I can commit it for you. If you are interested in obtaining the commit right. you can refer https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57732/new/ https://r

[PATCH] D57732: Correct inf typo

This revision was automatically updated to reflect the committed changes. Closed by commit rG4daa8d1de6dd: Correct inf typo (authored by gaul, committed by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57732/new/ https://reviews.llvm.org/D5773

[PATCH] D71374: Improve support of GNU mempcpy

Jim added a comment. I am curious what is difference of code generation after applying your changes? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71374/new/ https://reviews.llvm.org/D71374 ___ cfe-com

[PATCH] D61549: Fix use of 'is' operator for comparison

Jim added a comment. @j-carl Could you give a Python 3.8 syntax reference for this change. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D61549/new/ https://reviews.llvm.org/D61549 ___ cfe-commits mailing list cfe-com

[PATCH] D66839: Fix stack address builtin for negative numbers

Jim added a comment. I think this checking should be implemented in lib/Sema/SemaChecking.cpp. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D66839/new/ https://reviews.llvm.org/D66839 ___ cfe-commits m

[PATCH] D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO

Jim added a comment. This patch is only for RISCV. The title should have prefix "[RISCV]". Comment at: clang/lib/Driver/ToolChains/Arch/RISCV.cpp:585 +const llvm::opt::ArgList &Args, +llvm::opt::ArgStringList &CmdA

[PATCH] D71541: [Clang]: fix spelling mistake in assert message

Jim added a comment. Could you add "[NFC]" in the title. That means No Function Change. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71541/new/ https://reviews.llvm.org/D71541 ___ cfe-commits mailing list cfe-commi

[PATCH] D71541: [NFC] [Clang]: fix spelling mistake in assert message

Jim added a comment. Do you need someone to commit this change for you? Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D71541/new/ https://reviews.llvm.org/D71541 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D45677: [libcxx] [test] Fix typo in filesystem test

Jim added a comment. This is fixed by https://reviews.llvm.org/rG437e0e5191ca255db27e86d232020844c1fd08c8. Repository: rCXX libc++ CHANGES SINCE LAST ACTION https://reviews.llvm.org/D45677/new/ https://reviews.llvm.org/D45677 ___ cfe-commits

[PATCH] D70401: [WIP][RISCV] Implement ilp32e ABI

Jim added inline comments. Comment at: llvm/test/CodeGen/RISCV/calling-conv-ilp32e-double-bug.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -target-abi ilp32e -mattr=+f -verify-machineinstrs < %s +; RUN: llc -mtr

[PATCH] D72825: Remove unused option that gcc ignored

Jim added a comment. ping? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72825/new/ https://reviews.llvm.org/D72825 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bi

[PATCH] D72825: [NFC] Fix options name typo

Jim added a comment. It should be kept for compatibility. These three options may be used in other projects compiled by gcc. Clang should ignore it. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.o

[PATCH] D72825: Remove unused option that gcc ignored

Jim updated this revision to Diff 239246. Jim retitled this revision from "[NFC] Fix options name typo" to "Remove unused option that gcc ignored". Jim edited the summary of this revision. Jim added a comment. Address the comment. Delete the options. Repository: rG LLVM Github Monorepo CHANG

[PATCH] D153235: [RISCV] Change the type of argument to clz and ctz from ZiZi/WiWi to iUi/iULi

Jim created this revision. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, si

[PATCH] D153235: [RISCV] Change the type of argument to clz and ctz from ZiZi/WiWi to iUi/iULi

Jim updated this revision to Diff 532790. Jim added a comment. Address comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153235/new/ https://reviews.llvm.org/D153235 Files: clang/include/clang/Basic/BuiltinsRISCV.def clang/test/CodeGen/RI

[PATCH] D153235: [RISCV] Change the type of argument to clz and ctz from ZiZi/WiWi to iUZi/iUWi

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG612b7e10a9af: [RISCV] Change the type of argument to clz and ctz from ZiZi/WiWi to iUZi/iUWi (authored by Jim). Changed prior to commit: https://r

[PATCH] D150945: [RISCV] Add missing test for ctz_32 on RV64

This revision was automatically updated to reflect the committed changes. Closed by commit rG33d3d51d77a7: [RISCV] Add missing test for ctz_32 on RV64 (authored by Jim). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D150945/new/ https://reviews.llvm.

[PATCH] D150945: [RISCV] Add missing test for ctz_32 on RV64

Jim created this revision. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, si

[PATCH] D108189: [RISCV] Support experimental 'P' extension 0.96

Jim added a comment. Herald added a subscriber: eopXD. In D108189#3188343 , @zixuan-wu wrote: > Hi, @Jim. > What time is P extension going to upstream to community since it's been no > update for some months? Hi @zixuan-wu, From RVP 0.9.7, it has lots

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim marked 2 inline comments as done. Jim added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoP.td:909 + +// kmar64 has a aliased instruction kmada32 belong to zpn sub-extension on RV64. +let DecoderNamespace = "RISCV32Zpsfoperand_", Jim wrote

[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

Jim marked an inline comment as done. Jim added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll:4360 ; LMULMAX1-RV64-NEXT:vid.v v10 +; LMULMAX1-RV64-NEXT:vadd.vi v11, v10, 2 +; LMULMAX1-RV64-NEXT:lui a2, %hi(.LCPI132_2)

[PATCH] D101426: [RISCV] Update subset naming convertion for the latest spec

Jim created this revision. Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso,

[PATCH] D101426: [RISCV] Update subset naming convertion for the latest spec

Jim added a comment. GCC has been updated from https://github.com/gcc-mirror/gcc/commit/ca1a9763a1f635d2687ebd5009dd61d4fd0ab5fb#diff-622e89d94803bb804711d5d492a5d4dfa60399bd7a5a7e70a49155534aa6a81f Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101

[PATCH] D116509: [Builtins] Add missing the macro 'y' description in comments

Jim created this revision. Jim requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D116509 Files: clang/include/clang/Basic/Builtins.def Index: clang/include/clang/Basic/Built

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