Author: Freddy Ye
Date: 2022-09-02T16:06:07+08:00
New Revision: 66f332bc1ac04430580a8498ab5537b392f3ea1e
URL:
https://github.com/llvm/llvm-project/commit/66f332bc1ac04430580a8498ab5537b392f3ea1e
DIFF:
https://github.com/llvm/llvm-project/commit/66f332bc1ac04430580a8498ab5537b392f3ea1e.diff
LOG
@@ -7416,3 +7416,46 @@ that ``p->array`` must have at least ``p->count`` number
of elements available:
}];
}
+
+def CodeAlignAttrDocs : Documentation {
+ let Category = DocCatVariable;
+ let Heading = "clang::code_align";
+ let Content = [{
+The ``clang::code_align(N)``
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/75580
Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove its support in LLVM 19. In LLVM 18, we will first
emit a warning for the usage.
>From e16afbdc9f0c04bad0e8f80f90c0eb26c
FreddyLeaf wrote:
Let me first paste reasons I listed before:
1. INTEL has officially announced these products’ EOL on about Aug. 2017
1. Even for now, clang/llvm’s supports on these products are incomplete. For
example, knm targets has AVX5124FMAPS instructions, while its intrinsic and
assembl
FreddyLeaf wrote:
And here're two more reasons I collected from gcc:
1. previously ICC and ICX has removed the support and emitted errors
1. we would also like to remove the support in GCC to reduce maintainence
effort.
https://github.com/llvm/llvm-project/pull/75580
___
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https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/2] [X86] Emit Warnings for frontend options to enable
knl/knm.
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/3] [X86] Emit Warnings for frontend options to enable
knl/knm.
@@ -349,6 +349,8 @@ def warn_invalid_feature_combination : Warning<
def warn_target_unrecognized_env : Warning<
"mismatch between architecture and environment in target triple '%0'; did
you mean '%1'?">,
InGroup;
+def warn_knl_knm_target_supports_remove : Warning<
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/4] [X86] Emit Warnings for frontend options to enable
knl/knm.
FreddyLeaf wrote:
> Can you give me a better idea of the stages you intend to follow with this.
> The patch title suggests removing all KNL/KNM handling but the patch itself
> looks to be just about the KNL/KNM specific features.
I have created a draft PR to do removal in next release:
https:
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/5] [X86] Emit Warnings for frontend options to enable
knl/knm.
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/76389
>From 36e618e3b4eb083510de80c9ee6c0732948f3bc5 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Dec 2023 16:39:21 +0800
Subject: [PATCH 1/2] [X86] Correct operand order of UWRMSR.
---
llvm/lib/Target/X
https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/76389
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FreddyLeaf wrote:
https://github.com/llvm/llvm-project/assets/64940021/9b7acece-cbbe-453e-b913-9b13a6f79b56";>
CCMP is already disclosed in https://cdrdv2.intel.com/v1/dl/getContent/784266
https://github.com/llvm/llvm-project/pull/76389
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https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/76420
According to latest spec: https://cdrdv2.intel.com/v1/dl/getContent/671368
>From ae1d12c24facb36323b9b46a73a1fbc3edff4dc8 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Wed, 27 Dec 2023 10:33:30 +0800
Subjec
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/76420
>From ae1d12c24facb36323b9b46a73a1fbc3edff4dc8 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Wed, 27 Dec 2023 10:33:30 +0800
Subject: [PATCH] [X86] Remove RAO-INT from Grandridge
According to latest spec: ht
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/76420
>From ae1d12c24facb36323b9b46a73a1fbc3edff4dc8 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Wed, 27 Dec 2023 10:33:30 +0800
Subject: [PATCH] [X86] Remove RAO-INT from Grandridge
According to latest spec: ht
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/76420
>From ae1d12c24facb36323b9b46a73a1fbc3edff4dc8 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Wed, 27 Dec 2023 10:33:30 +0800
Subject: [PATCH] [X86] Remove RAO-INT from Grandridge
According to latest spec: ht
https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/76420
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FreddyLeaf wrote:
ping for review
@RKSimon are we aligned on the direction to removing knl/knm supports in the
end?
https://github.com/llvm/llvm-project/pull/75580
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FreddyLeaf wrote:
Keeping `-march` supports for knl/knm meanwhile removing the specific ISA's
intrinsic supports doesn't sound quite good to me. And thanks @phoebewang
mentioned, removing the KNL/KNM supports could make all other targets always
support AVX512F and AVX512VL meanwhile. This can
FreddyLeaf wrote:
@RKSimon @phoebewang Thanks comments! knm has AVX512_VPOPCNTDQ, I guess we
also require it work without avx512vl? And we are going to keep
-march/mtune/mcpu support for knl/knm, but removing some specific ISA's
intrinsic and lowering supports? Did I get your point wrong?
h
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/6] [X86] Emit Warnings for frontend options to enable
knl/knm.
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/75580
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FreddyLeaf wrote:
> > @RKSimon @phoebewang Thanks comments! knm has AVX512_VPOPCNTDQ, I guess we
> > also require it work without avx512vl? And we are going to keep
> > -march/mtune/mcpu support for knl/knm, but removing some specific ISA's
> > intrinsic and lowering supports? Did I get your p
@@ -22,10 +22,7 @@ define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; X86-NEXT:vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT:vmovss %xmm0, (%esp)
; X86-NEXT:calll __truncsfbf2
-; X86-NEXT:fstps {{[0-9]+}}(%esp)
-; X86-NEXT:vmovd {{.*#+}} xmm0 = mem[0],zero,zer
@@ -22,10 +22,7 @@ define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; X86-NEXT:vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT:vmovss %xmm0, (%esp)
; X86-NEXT:calll __truncsfbf2
-; X86-NEXT:fstps {{[0-9]+}}(%esp)
-; X86-NEXT:vmovd {{.*#+}} xmm0 = mem[0],zero,zer
https://github.com/FreddyLeaf approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/76901
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@@ -22,10 +22,7 @@ define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; X86-NEXT:vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT:vmovss %xmm0, (%esp)
; X86-NEXT:calll __truncsfbf2
-; X86-NEXT:fstps {{[0-9]+}}(%esp)
-; X86-NEXT:vmovd {{.*#+}} xmm0 = mem[0],zero,zer
FreddyLeaf wrote:
ping for review
https://github.com/llvm/llvm-project/pull/75580
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@@ -69,7 +69,10 @@
// RUN: %clang_cl -m32 -arch:avx2 --target=i386-pc-windows -### -- 2>&1 %s |
FileCheck -check-prefix=avx2 %s
// avx2: invalid /arch: argument
-// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj
-Xclang -verify -DTEST_32_ARCH_AVX512F
@@ -18,7 +18,7 @@ This test serves two purposes:
The list of warnings below should NEVER grow. It should gradually shrink to 0.
-CHECK: Warnings without flags (65):
FreddyLeaf wrote:
Emm, seems like increased six months ago: https://reviews.llvm.org/D154251
@@ -18,7 +18,7 @@ This test serves two purposes:
The list of warnings below should NEVER grow. It should gradually shrink to 0.
-CHECK: Warnings without flags (65):
FreddyLeaf wrote:
Will fix
https://github.com/llvm/llvm-project/pull/75580
@@ -18,7 +18,7 @@ This test serves two purposes:
The list of warnings below should NEVER grow. It should gradually shrink to 0.
-CHECK: Warnings without flags (65):
FreddyLeaf wrote:
agree. Will add a warning group. sorry for misleading info above.
https:/
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/7] [X86] Emit Warnings for frontend options to enable
knl/knm.
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/7] [X86] Emit Warnings for frontend options to enable
knl/knm.
FreddyLeaf wrote:
ping for review.
https://github.com/llvm/llvm-project/pull/75580
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https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/8] [X86] Emit Warnings for frontend options to enable
knl/knm.
@@ -933,6 +933,9 @@ X86 Support
- Support ISA of ``AVX10.1``.
- ``-march=pantherlake`` and ``-march=clearwaterforest`` are now supported.
- Added ABI handling for ``__float128`` to match with GCC.
+- Emit Warnings for clang options to enable knl/knm. From next version
+ (LLVM
@@ -69,7 +69,10 @@
// RUN: %clang_cl -m32 -arch:avx2 --target=i386-pc-windows -### -- 2>&1 %s |
FileCheck -check-prefix=avx2 %s
// avx2: invalid /arch: argument
-// RUN: %clang_cl -m32 -arch:AVX512F --target=i386-pc-windows /c /Fo%t.obj
-Xclang -verify -DTEST_32_ARCH_AVX512F
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/75580
>From e16afbdc9f0c04bad0e8f80f90c0eb26c13d3326 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 15 Dec 2023 16:50:23 +0800
Subject: [PATCH 1/9] [X86] Emit Warnings for frontend options to enable
knl/knm.
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/75580
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FreddyLeaf wrote:
Thank you all!
https://github.com/llvm/llvm-project/pull/75580
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https://github.com/FreddyLeaf closed
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https://github.com/FreddyLeaf approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/77525
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Author: Freddy Ye
Date: 2021-07-29T13:28:10+08:00
New Revision: 58712987e56fb598ac49da7fbe6e6a78c787637b
URL:
https://github.com/llvm/llvm-project/commit/58712987e56fb598ac49da7fbe6e6a78c787637b
DIFF:
https://github.com/llvm/llvm-project/commit/58712987e56fb598ac49da7fbe6e6a78c787637b.diff
LOG
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/80815
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FreddyLeaf wrote:
> Past the link of GCC files in description?
Done.
https://github.com/llvm/llvm-project/pull/80815
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https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/80815
>From 2ed2333085d40ece903b2d70e0da7371b72209f4 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 6 Feb 2024 17:20:31 +0800
Subject: [PATCH 1/2] [X86] Add missing MACROs in cpuid.h
---
clang/lib/Headers/cpu
@@ -211,7 +214,11 @@
/* Features in %edx for leaf 7 sub-leaf 1 */
#define bit_AVXVNNIINT8 0x0010
#define bit_AVXNECONVERT 0x0020
+#define bit_AMXCOMPLEX0x0100
+#define bit_AVXVNNIINT16 0x0400
#define bit_PREFETCHI 0x4000
+#define bit_USERMSR
FreddyLeaf wrote:
ping for review
https://github.com/llvm/llvm-project/pull/80636
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@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
+ Feat
FreddyLeaf wrote:
Thanks review!
https://github.com/llvm/llvm-project/pull/80815
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https://github.com/FreddyLeaf closed
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https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/80636
>From b131b0971d5c38a29c954b37c0da8fb3177e5c92 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 5 Feb 2024 14:07:29 +0800
Subject: [PATCH 1/3] [X86] Support APXF to enable __builtin_cpu_supports.
---
clan
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
+ Feat
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
+ Feat
@@ -1845,6 +1845,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["prefetchi"] = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
Features["usermsr"] = HasLeaf7Subleaf1 && ((EDX >> 15) & 1);
Features["avx10.1-256"] = HasLeaf7Subleaf1 && ((EDX >> 19) & 1);
+ Feat
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/84136
- [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2
- Handle attribute/target
>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Se
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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@@ -15,7 +15,7 @@ int baz(__m256i a) {
#if NEED_AVX_2
__m128 need_avx(__m128 a, __m128 b) {
- return _mm_cmp_ps(a, b, 0); // expected-error {{'__builtin_ia32_cmpps' needs
target feature avx}}
+ return _mm_cmp_ps(a, b, 8); // expected-error {{'__builtin_ia32_cmpps' needs
ta
FreddyLeaf wrote:
The difference with #67410 is here: 54c78b5ad694946186ba115576a6eea9c8992349
https://github.com/llvm/llvm-project/pull/84136
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@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia
@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia
FreddyLeaf wrote:
> My understanding is that you change the required feature of
> __builtin_ia32_cmp[p|s][s|d] from avx to sse for some condition codes. The
> title is not accurate.
You are right. Updated.
https://github.com/llvm/llvm-project/pull/84136
___
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Sep 2023 16:44:01 +0800
Subject: [PATCH 1/3] [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from
avx
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
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@@ -1719,3 +1719,57 @@ __m128i test_mm_xor_si128(__m128i A, __m128i B) {
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128d test_mm_cmp_pd_eq_oq(__m128d a, __m128d b) {
FreddyLeaf wrote:
[d8979e2](https://github.com/llvm/llvm
@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_EQ_OQ
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b, _CMP_EQ_OQ
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/84136
>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Sep 2023 16:44:01 +0800
Subject: [PATCH 1/5] [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from
avx
@@ -2940,6 +2940,134 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02 /
@@ -4745,6 +4745,127 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castsi128_pd(__m128i __a) {
return (__m128d)__a;
}
+/// Compares each of the corresponding double-precision values of two
+///128-bit vectors of [2 x double], using the operation specified by the
+
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
FreddyLeaf wrote:
> Still not understand. Shouldn't the target feature of the caller be passed to
> the intrinsic when checking the argument of the intrinsic?
The target features passing from option can be passed to Semachecking. It's
special for attribute_target, which is handled in `handleTar
FreddyLeaf wrote:
> > > Still not understand. Shouldn't the target feature of the caller be
> > > passed to the intrinsic when checking the argument of the intrinsic?
> >
> >
> > The target features passing from option can be passed to Semachecking. It's
> > special for attribute_target, whic
FreddyLeaf wrote:
ping for review
https://github.com/llvm/llvm-project/pull/84136
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https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/84136
>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Sep 2023 16:44:01 +0800
Subject: [PATCH 1/6] [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from
avx
@@ -2940,6 +2940,84 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02 /*
@@ -2940,6 +2940,84 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02 /*
@@ -4745,6 +4745,77 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castsi128_pd(__m128i __a) {
return (__m128d)__a;
}
+/// Compares each of the corresponding double-precision values of two
+///128-bit vectors of [2 x double], using the operation specified by the
+/
@@ -4745,6 +4745,77 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castsi128_pd(__m128i __a) {
return (__m128d)__a;
}
+/// Compares each of the corresponding double-precision values of two
+///128-bit vectors of [2 x double], using the operation specified by the
+/
FreddyLeaf wrote:
> Thanks for the heads-up @RKSimon I've made suggestions for consistency with
> existing practice in emmintrin.h which I've adopted in the latest revision to
> #83316.
>
> I'm unsure how replacing a function declaration with an \fn directive will
> play with our documentatio
https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/84136
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FreddyLeaf wrote:
ping for review
https://github.com/llvm/llvm-project/pull/79086
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@@ -139,20 +139,77 @@ enum ProcessorFeatures {
FEATURE_AVX512BITALG,
FEATURE_AVX512BF16,
FEATURE_AVX512VP2INTERSECT,
+ FEATURE_3DNOW,
+ FEATURE_ADX = 40,
+ FEATURE_CLDEMOTE = 42,
FreddyLeaf wrote:
The missing features are ones I can't recognize in
ht
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/79086
>From b5c8579c5c8e7ea1e8436348bbf60ecee9c3c799 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 19 Jan 2024 09:22:27 +0800
Subject: [PATCH 1/5] [X86] Support more ISAs to enable __builtin_cpu_supports
This
@@ -139,20 +139,77 @@ enum ProcessorFeatures {
FEATURE_AVX512BITALG,
FEATURE_AVX512BF16,
FEATURE_AVX512VP2INTERSECT,
+ FEATURE_3DNOW,
+ FEATURE_ADX = 40,
+ FEATURE_CLDEMOTE = 42,
FreddyLeaf wrote:
agree, done in 10c2a7c
https://github.com/llvm/llvm-p
FreddyLeaf wrote:
ping for review
https://github.com/llvm/llvm-project/pull/79086
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https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/76383
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