@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
orcguru wrote:
I think `MCContext::createXCOFFSymbolImpl` is the logic tha
@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
orcguru wrote:
I think `MCContext::createXCOFFSymbolImpl` is the logic tha
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@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
orcguru wrote:
Thank you! I will put some flag check before the string com
@@ -2645,10 +2653,14 @@ MCSection
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
const MCSymbol *Sym, const TargetMachine &TM) const {
// Use TE storage-mapping class when large code model is enabled so that
// the chance of needing -bbigtoc is decreased.
+ //
@@ -2645,10 +2653,14 @@ MCSection
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
const MCSymbol *Sym, const TargetMachine &TM) const {
// Use TE storage-mapping class when large code model is enabled so that
// the chance of needing -bbigtoc is decreased.
+ //
@@ -846,6 +859,19 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
if (MO.getTargetFlags() & PPCII::MO_TLSGD_FLAG)
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;
+if (MO.getTarg
https://github.com/orcguru updated
https://github.com/llvm/llvm-project/pull/84132
>From 92ab84000b638e206106bf5b1e9e2e842f5bcf2b Mon Sep 17 00:00:00 2001
From: Ting Wang
Date: Wed, 6 Mar 2024 02:51:40 -0500
Subject: [PATCH 1/4] [PowerPC] Rename symbols references by tls-local-dynamic
model
O
https://github.com/orcguru updated
https://github.com/llvm/llvm-project/pull/84132
>From 92ab84000b638e206106bf5b1e9e2e842f5bcf2b Mon Sep 17 00:00:00 2001
From: Ting Wang
Date: Wed, 6 Mar 2024 02:51:40 -0500
Subject: [PATCH 1/5] [PowerPC] Rename symbols references by tls-local-dynamic
model
O
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@@ -80,6 +80,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public
TargetInfo {
bool IsISA3_0 = false;
bool IsISA3_1 = false;
bool HasQuadwordAtomics = false;
+ bool HasAIXShLibTLSModelHeuristic = false;
orcguru wrote:
Hi Kai, Thank you for pointin
@@ -3369,6 +3369,48 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize heu
@@ -329,6 +329,12 @@ def FeatureAIXLocalExecTLS :
"Produce a TOC-free local-exec TLS sequence for this
function "
"for 64-bit AIX">;
+def FeatureAIXSharedLibraryTLSModelHeuristic :
+ SubtargetFeature<"aix-shared-library-tls-model-heurist
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@@ -145,9 +164,89 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +164,89 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +164,89 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -370,11 +370,22 @@ namespace llvm {
/// G8RC = TLSGD_AIX, TOC_ENTRY, TOC_ENTRY
/// Op that combines two register copies of TOC entries
/// (region handle into R3 and variable offset into R4) followed by a
-/// GET_TLS_ADDR node which will be expanded to a cal
orcguru wrote:
> A question: For `PPCTLSDynamicCall.cpp`, would it be better if we instead
> reworded some of the sentences and not use `Load*@toc`?
>
> I thought about this for a bit and I think the full sentences may be a bit
> better, so I added some sample comment suggestions, but if you t
orcguru wrote:
Thank you all for your efforts reviewing the patch!
If no objections, I will land it before the weekend. Thank you!
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@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
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orcguru wrote:
> > I tried to parallelize the review effort, but github didn't show the delta
> > for me: #66972
>
> Let's include FE change in this PR.
Thanks! Added clang change.
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orcguru wrote:
> The primary advantage of the local-dynamic access method is that you only
> make a single function call to __tls_get_mod() and use the returned pointer
> to get at all TLS variables. This implementation makes a function call for
> every variable. The only thing you've gained i
@@ -156,10 +156,11 @@ define void @storesTIInit(double %Val) #0 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT:mflr 0
; SMALL32-NEXT:stwu 1, -32(1)
-; SMALL32-NEXT:lwz 3, L..C4(2) # target-flags(ppc-lo) @TIInit
-; SMALL32-NEXT:lwz 4, L..C5(2) # target-flags
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@@ -1622,6 +1629,10 @@ def TLSGDAIX8 :
"#TLSGDAIX8",
[(set i64:$rD,
(PPCTlsgdAIX i64:$offset, i64:$handle))]>;
+// This pseudo is expanded to one copy to put the module handle in R3, then
call
+// GETtlsMOD64AIX,
@@ -231,12 +231,15 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
MCSymbolXCOFF *TCSym =
cast(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
- // On AIX, we have a region handle (symbol@m) and the variable offset
- /
@@ -1362,6 +1402,8 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
case PPC::GETtlsADDRPCREL:
case PPC::GETtlsADDR32AIX:
case PPC::GETtlsADDR64AIX:
+ case PPC::GETtlsMOD32AIX:
orcguru wrote:
Added following description:
// Transfor
@@ -2826,6 +2877,8 @@ void PPCAIXAsmPrinter::emitInstruction(const MachineInstr
*MI) {
MMI->hasDebugInfo());
break;
}
+ case PPC::GETtlsMOD32AIX:
+ case PPC::GETtlsMOD64AIX:
case PPC::GETtlsTpointer32AIX:
case PPC::GETtlsADDR64AIX:
case PPC::GE
@@ -1771,9 +1771,13 @@ const char
*PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
case PPCISD::ADDIS_TLSGD_HA: return "PPCISD::ADDIS_TLSGD_HA";
case PPCISD::ADDI_TLSGD_L:return "PPCISD::ADDI_TLSGD_L";
case PPCISD::GET_TLS_ADDR:return "PPCISD::GET_
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@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -156,10 +156,11 @@ define void @storesTIInit(double %Val) #0 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT:mflr 0
; SMALL32-NEXT:stwu 1, -32(1)
-; SMALL32-NEXT:lwz 3, L..C4(2) # target-flags(ppc-lo) @TIInit
-; SMALL32-NEXT:lwz 4, L..C5(2) # target-flags
orcguru wrote:
> > The primary advantage of the local-dynamic access method is that you only
> > make a single function call to __tls_get_mod() and use the returned pointer
> > to get at all TLS variables. This implementation makes a function call for
> > every variable. The only thing you've
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
orcguru wrote:
I'm working on environment issue, and will update remaining two LIT cases and
do testing etc.
I'm requesting another round of review in the mean time. Thank you all for your
inputs!
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orcguru wrote:
> For below case:
>
> ```
> __thread extern int x = 42;
> __thread extern int y = 42;
> int main(void) {
>return x + y;
> }
> ```
>
> For now, we get:
>
> ```
> .main:
> # %bb.0:# %entry
> mflr 0
> stwu 1, -32(1)
> stw
orcguru wrote:
Currently obj mode has one issue: define more than one __thread variable, and
all access return the first variable.
I'm investigating the root cause and will update patch accordingly. ASM mode is
fine.
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orcguru wrote:
When a module contains three TLS LD variables
>From assembly file generated by "as -a64 -many -o"
```
02f8 (idx: 33) a[TC]:
2f8: 00 00 00 00
02f8: R_TLS_LD (idx: 41) a[TL]
2fc: 00 00 00 00
0300 (idx: 35) _$T
orcguru wrote:
Missing an update in `recordRelocation()` similar as the patch:
https://reviews.llvm.org/D155415.
Working on it now.
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orcguru wrote:
> Missing an update in `recordRelocation()` similar as the patch:
> https://reviews.llvm.org/D155415.
>
> Working on it now.
Done. Added one test case aix-tls-ld-xcoff-reloc-large.ll to track this kind of
issue. If full set of test case is necessary, please let me know, and I w
@@ -116,6 +116,10 @@ std::pair
PPCXCOFFObjectWriter::getRelocTypeAndSignSize(
return {XCOFF::RelocationType::R_TLS_IE, SignAndSizeForFKData};
case MCSymbolRefExpr::VK_PPC_AIX_TLSLE:
return {XCOFF::RelocationType::R_TLS_LE, SignAndSizeForFKData};
+case MCSym
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@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
orcguru wrote:
I saw comments being folded, paste here for notice, sorry about the duplication:
So I did have another version which can essentially remove the assert check
with some side effects:
(1) It did generated extra external symbol reference, which looks like no harm
with simple HelloW
orcguru wrote:
> The code formatting check fails.
That is intentional:
https://github.com/llvm/llvm-project/pull/66316#discussion_r1333195506
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@@ -6,6 +6,6 @@
#endif
static __thread int y __attribute((tls_model("global-dynamic"))); // no-warning
-static __thread int y __attribute((tls_model("local-dynamic"))); //
expected-error {{TLS model 'local-dynamic' is not yet supported on AIX}}
+static __thread int y __attrib
orcguru wrote:
> Also, is it intentional that we combined the patch to enable local-dynamic in
> clang within this patch? Just wondering since I thought I saw a separate
> patch for the clang portion before (unless I am mistaken).
Yes, I have to combine all changes into a monolithic patch, sim
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -6,6 +6,6 @@
#endif
static __thread int y __attribute((tls_model("global-dynamic"))); // no-warning
-static __thread int y __attribute((tls_model("local-dynamic"))); //
expected-error {{TLS model 'local-dynamic' is not yet supported on AIX}}
+static __thread int y __attrib
@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
"GETtls[ld]ADDR[32] must read GPR3");
if (Subtarget->isAIXABI()) {
-// On AIX, the variable offset should already be in R4 and the region
handle
-// should already be in R3.
-
@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
orcguru wrote:
> I believe some of the test cases also require updates as a result of #80162.
Sure. Updated!
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@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
orcguru wrote:
> Since this patch relies on the local-dynamic patch, I think the local-dynamic
> changes are already in here, right? Do we know if there is a way yet to make
> dependent pull requests, just so reviewing this patch may be a bit easier
> when the local-dynamic changes are separat
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@@ -3369,6 +3369,59 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize TLS
@@ -3369,6 +3369,59 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize TLS
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orcguru wrote:
Since https://github.com/llvm/llvm-project/pull/86641 has been merged, I will
continue work on this patch to handle the interactions of these two flags.
Mean while I'm waiting for more review comments from experts. Thank you!
https://github.com/llvm/llvm-project/pull/84132
_
https://github.com/orcguru created
https://github.com/llvm/llvm-project/pull/88829
This patch adds the clang portion of an AIX-specific option to inform the
compiler that it can use a faster access sequence for the local-dynamic
TLS model (formally named aix-small-local-dynamic-tls).
This patch
@@ -5019,6 +5019,10 @@ def maix_small_local_exec_tls : Flag<["-"],
"maix-small-local-exec-tls">,
"where the offset from the TLS base is encoded as an "
"immediate operand (AIX 64-bit only). "
"This access sequence is not used for variables larg
@@ -3362,6 +3362,64 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue
Op,
return LowerGlobalTLSAddressLinux(Op, DAG);
}
+/// updateForAIXShLibTLSModelOpt - Helper to initialize TLS model opt settings,
+/// and then apply the update.
+static void updateForAIXShLibT
@@ -3362,6 +3362,64 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue
Op,
return LowerGlobalTLSAddressLinux(Op, DAG);
}
+/// updateForAIXShLibTLSModelOpt - Helper to initialize TLS model opt settings,
+/// and then apply the update.
+static void updateForAIXShLibT
https://github.com/orcguru updated
https://github.com/llvm/llvm-project/pull/88829
>From 35bf12e2fcb499c8953e4207cea2296d9ddcbf1f Mon Sep 17 00:00:00 2001
From: Ting Wang
Date: Mon, 15 Apr 2024 21:52:02 -0400
Subject: [PATCH 1/2] Following Amy's b1922e55ab3b35dff99238fd0b74be00df0472e7,
and d5
https://github.com/orcguru closed
https://github.com/llvm/llvm-project/pull/88829
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https://github.com/orcguru edited
https://github.com/llvm/llvm-project/pull/84132
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orcguru wrote:
> It looks like a few of the regression tests are failing on the
> reverse-iteration buildbot
> (https://lab.llvm.org/buildbot/#/builders/54/builds/9683)
Thank you! Posted: https://github.com/llvm/llvm-project/pull/89714
https://github.com/llvm/llvm-project/pull/66316
_
https://github.com/orcguru closed
https://github.com/llvm/llvm-project/pull/84132
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