@@ -0,0 +1,31 @@
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s |
FileCheck %s
+
+; Make sure dxil operation function calls for countbits are generated for all
integer types.
+
+; Function Attrs: nounwind
+define noundef i16 @test_countbits_short(i16 no
@@ -0,0 +1,31 @@
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s |
FileCheck %s
+
+; Make sure dxil operation function calls for countbits are generated for all
integer types.
+
+; Function Attrs: nounwind
+define noundef i16 @test_countbits_short(i16 no
@@ -4737,6 +4737,12 @@ def HLSLRSqrt : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLSign : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_sign"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "int(...)";
--
@@ -1725,5 +1725,76 @@ _HLSL_AVAILABILITY(shadermodel, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_get_lane_index)
__attribute__((convergent)) uint WaveGetLaneIndex();
+//===--===//
+// sign builtins
+//===--
@@ -1725,5 +1725,76 @@ _HLSL_AVAILABILITY(shadermodel, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_get_lane_index)
__attribute__((convergent)) uint WaveGetLaneIndex();
+//===--===//
+// sign builtins
+//===--
@@ -1725,5 +1725,76 @@ _HLSL_AVAILABILITY(shadermodel, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_get_lane_index)
__attribute__((convergent)) uint WaveGetLaneIndex();
+//===--===//
+// sign builtins
+//===--
@@ -1725,5 +1725,76 @@ _HLSL_AVAILABILITY(shadermodel, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_get_lane_index)
__attribute__((convergent)) uint WaveGetLaneIndex();
+//===--===//
+// sign builtins
+//===--
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@@ -1108,6 +1117,14 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_elementwise_sign: {
+if (CheckFloatingOrSignedIntRepresentation(&SemaRef, TheCall))
+ return tru
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@@ -4725,6 +4725,12 @@ def HLSLMad : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLNormalize : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_normalize"];
farzonl wrote:
is this an elementwise case? isnt it `n = normali
@@ -18584,6 +18584,29 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
CGM.getHLSLRuntime().getLengthIntrinsic(), ArrayRef{X},
nullptr, "hlsl.length");
}
+ case Builtin::BI__builtin_hlsl_normalize: {
+Value *X = EmitScalarExpr(E->getArg
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@@ -18584,6 +18584,29 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
CGM.getHLSLRuntime().getLengthIntrinsic(), ArrayRef{X},
nullptr, "hlsl.length");
}
+ case Builtin::BI__builtin_hlsl_normalize: {
+Value *X = EmitScalarExpr(E->getArg
@@ -0,0 +1,31 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -verify-ignore-unexpected
+
+void test_too_few_arg()
+{
+ return __builtin_hlsl_normalize();
+ // expected-error@-
@@ -0,0 +1,118 @@
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s
--check-prefixes=CHECK,EXPCHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s |
FileCheck %s --check-prefixes=CHECK,DOPCHECK
+
+; Make sure dxil operation function call
@@ -0,0 +1,10 @@
+; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s
2>&1 | FileCheck %s
+
+; DXIL operation normalize does not support double overload type
+; CHECK: Cannot create Dot2 operation: Invalid overload type
+
+define noundef <2 x double> @test
@@ -0,0 +1,29 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; Make sure SPIRV operation function calls for normalize are lowered correctly.
+
+; CH
@@ -229,6 +230,75 @@ static bool expandLog10Intrinsic(CallInst *Orig) {
return expandLogIntrinsic(Orig, numbers::ln2f / numbers::ln10f);
}
+static bool expandNormalizeIntrinsic(CallInst *Orig) {
+ Value *X = Orig->getOperand(0);
+ Type *Ty = Orig->getType();
+ Type *EltTy
@@ -0,0 +1,29 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; Make sure SPIRV operation function calls for normalize are lowered correctly.
+
+; CH
@@ -0,0 +1,118 @@
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s
--check-prefixes=CHECK,EXPCHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s |
FileCheck %s --check-prefixes=CHECK,DOPCHECK
+
+; Make sure dxil operation function call
@@ -0,0 +1,118 @@
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s
--check-prefixes=CHECK,EXPCHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s |
FileCheck %s --check-prefixes=CHECK,DOPCHECK
+
+; Make sure dxil operation function call
farzonl wrote:
this is looking pretty good will do a second pass tomorrow.
https://github.com/llvm/llvm-project/pull/102683
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@@ -18528,37 +18520,38 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *Op1 = EmitScalarExpr(E->getArg(1));
llvm::Type *T0 = Op0->getType();
llvm::Type *T1 = Op1->getType();
+
+// If the arguments are scalars, just emit a multiply
@@ -18528,37 +18520,38 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *Op1 = EmitScalarExpr(E->getArg(1));
llvm::Type *T0 = Op0->getType();
llvm::Type *T1 = Op1->getType();
+
+// If the arguments are scalars, just emit a multiply
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@@ -18584,6 +18584,29 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
CGM.getHLSLRuntime().getLengthIntrinsic(), ArrayRef{X},
nullptr, "hlsl.length");
}
+ case Builtin::BI__builtin_hlsl_normalize: {
+Value *X = EmitScalarExpr(E->getArg
@@ -18470,22 +18470,14 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
-Intrinsic::ID getDotProductIntrinsic(QualType QT, int elementCount) {
- if (QT->hasFloatingRepresentation()) {
-switch (elementCount) {
-case 2
@@ -18470,22 +18470,14 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
-Intrinsic::ID getDotProductIntrinsic(QualType QT, int elementCount) {
- if (QT->hasFloatingRepresentation()) {
-switch (elementCount) {
-case 2
@@ -18528,37 +18520,38 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *Op1 = EmitScalarExpr(E->getArg(1));
llvm::Type *T0 = Op0->getType();
llvm::Type *T1 = Op1->getType();
+
+// If the arguments are scalars, just emit a multiply
@@ -7,155 +7,155 @@
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
#ifdef __HLSL_ENABLE_16_BIT
-// NATIVE_HALF: %dx.dot = mul i16 %0, %1
-// NATIVE_HALF: ret i16 %dx.dot
+// NATIVE_HALF: %dot = mul i16 %0, %1
+// NATIVE_HALF: ret i16 %dot
int16_t test_dot_short(
@@ -1045,6 +1045,15 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable,
IntrWillReturn] in {
def int_nearbyint : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0>]>;
def int_round : DefaultAttrsIntrinsic<[llvm_anyfloat_ty],
[LLVMMatchType<0>]>;
def int_roun
@@ -70,31 +71,57 @@ static bool expandAbs(CallInst *Orig) {
return true;
}
-static bool expandIntegerDot(CallInst *Orig, Intrinsic::ID DotIntrinsic) {
- assert(DotIntrinsic == Intrinsic::dx_sdot ||
- DotIntrinsic == Intrinsic::dx_udot);
- Intrinsic::ID MadIntrinsic
@@ -1366,6 +1383,67 @@ bool SPIRVInstructionSelector::selectRsqrt(Register
ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
+// Since there is no integer dot implementation, expand by piecewise
multiplying
farzonl wrote:
actually I see a `OpSDot`, `OpUDot
https://github.com/farzonl edited
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farzonl wrote:
> AArch64 has a udot and sdot instruction (and a usdot instruction). They
> perform a "partial" reduction though, producing a v4i32 from two v16i8
> inputs. We would like to use those from the vectorizer and have recently
> added a partial-reduction intrinsic, but doing it with
@@ -18470,22 +18470,14 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
-Intrinsic::ID getDotProductIntrinsic(QualType QT, int elementCount) {
- if (QT->hasFloatingRepresentation()) {
-switch (elementCount) {
-case 2
@@ -4725,6 +4725,12 @@ def HLSLMad : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLNormalize : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_normalize"];
farzonl wrote:
I guess the point i was trying to make was that fo
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@@ -380,6 +383,20 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
MIB.addImm(V);
return MIB.constrainAllUses(TII, TRI, RBI);
}
+
+ case TargetOpcode::G_FDOTPROD: {
+MachineBasicBlock &BB = *I.getParent();
+return BuildMI(BB, I, I.getDebugLoc()
@@ -18584,6 +18584,29 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
CGM.getHLSLRuntime().getLengthIntrinsic(), ArrayRef{X},
nullptr, "hlsl.length");
}
+ case Builtin::BI__builtin_hlsl_normalize: {
+Value *X = EmitScalarExpr(E->getArg
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@@ -4725,6 +4725,12 @@ def HLSLMad : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLNormalize : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_normalize"];
farzonl wrote:
I'm fine with this as is. resolving.
https://gith
@@ -0,0 +1,73 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -fi
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@@ -0,0 +1,118 @@
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s
--check-prefixes=CHECK,EXPCHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s |
FileCheck %s --check-prefixes=CHECK,DOPCHECK
+
+; Make sure dxil operation function call
farzonl wrote:
> Please create a separate RFC for these intrinsics. I don't think there is a
> consensus on these intrinsics, and
> https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 covers way too
> much disparate ground (something like "tan" and something like "dot" are
> entire
farzonl wrote:
We have this work tracked here:
https://github.com/llvm/llvm-project/issues/99158
there should be some dxil specific tasks.
https://github.com/llvm/llvm-project/pull/103299
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https:
@@ -18660,6 +18660,10 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
llvm::FunctionType::get(IntTy, {}, false),
"__hlsl_wave_get_lane_index",
{}, false, true));
}
+ case Builtin::BI__builtin_hlsl_wave_is_first_lane: {
+Intrinsic::ID ID = CGM.getH
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@@ -18662,6 +18662,23 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
llvm::FunctionType::get(IntTy, {}, false),
"__hlsl_wave_get_lane_index",
{}, false, true));
}
+ case Builtin::BI__builtin_hlsl_elementwise_sign: {
+Value *Op0 = EmitScalarExpr(E
@@ -916,7 +916,7 @@ float4 lerp(float4, float4, float4);
/// \brief Returns the length of the specified floating-point vector.
/// \param x [in] The vector of floats, or a scalar float.
///
-/// Length is based on the following formula: sqrt(x[0]^2 + x[1]^2 + �).
+/// Length is
@@ -1725,5 +1725,76 @@ _HLSL_AVAILABILITY(shadermodel, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_get_lane_index)
__attribute__((convergent)) uint WaveGetLaneIndex();
+//===--===//
+// sign builtins
+//===--
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@@ -0,0 +1,47 @@
+
+//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/87171
>From 6e088142af4196f11bc006e0024d4ca0ac4e08f0 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 01/11] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/inc
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/87171
>From 6e088142af4196f11bc006e0024d4ca0ac4e08f0 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 01/11] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/inc
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farzonl wrote:
> The `GENERATE_HLSL_INTRINSIC_FUNCTION` abstraction parts of this look fairly
> reasonable, but do we really want/need dx and spirv intrinsics for the "all"
> function? This is trivial to generate pretty generic IR for and I don't
> really see the value of maintaining that the
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/88325
- `CGBuiltin.cpp` - Switch to using
`CGM.getHLSLRuntime().get##NAME##Intrinsic()`
- `CGHLSLRuntime.h` - Add any to backend intrinsic abstraction
- `IntrinsicsSPIRV.td` - Add any intrinsic to SPIR-V.
- `SPIRVIns
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/88401
Removing the intrinsic because there is no opCodes for rcp in DXIL or SPIR-V.
Moving means we don't have to re-implement this feature for each backend.
fixes #87784
>From 5d8b581be602b6658ab6a1d0b15b5aedbea1ae1
@@ -0,0 +1,126 @@
+ ; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+
+; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64
+; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
+; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
+; CHECK-DAG: %[[#vec2_float_16:]] = OpTypeVector
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@@ -0,0 +1,126 @@
+ ; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+
+; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64
+; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
+; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
+; CHECK-DAG: %[[#vec2_float_16:]] = OpTypeVector
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@@ -0,0 +1,126 @@
+ ; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+
+; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64
+; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
+; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
+; CHECK-DAG: %[[#vec2_float_16:]] = OpTypeVector
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/94559
Relanding this PR now that https://github.com/llvm/llvm-project/pull/90503 has
merged. with `FTAN` landing in
[TargetLoweringBase.cpp:L1021](https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/Target
farzonl wrote:
@ilovepi I minimised the failing issue from:
https://fuchsia.googlesource.com/fuchsia/+/refs/heads/main/src/graphics/lib/compute/spinel/ext/transform_stack/transform_stack.c
to:
```cpp
#include
#include
#define SPN_TRANSFORM_STACK_TAN(x_) tanf(x_)
float
spinel_transform_stac
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>From 3c461b62ae530ddc965ddeea78246d782c8bb9c6 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 24 May 2024 10:01:52 -0400
Subject: [PATCH 1/2] [clang] Add tanf16 builtin and support for tan
constrained in
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/94559
>From 51247e430ad49c4729e2e3664104367b13fbad9e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 24 May 2024 10:01:52 -0400
Subject: [PATCH 1/3] [clang] Add tanf16 builtin and support for tan
constrained in
farzonl wrote:
> Should a test be added when the return type is a different float type than
> the first arg type?
So if our function that calls the builtin has a different return type than the
input that we pass in to the builtin then that will be handled by other casting
code that has its o
@@ -2923,6 +2923,18 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
SetSqrtFPAccuracy(Call);
return RValue::get(Call);
}
+
+case Builtin::BItan:
farzonl wrote:
def TanF16F128 : Builtin, F16F128MathTempla
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@@ -7881,7 +8111,7 @@ declare <3 x double>
@llvm.experimental.constrained.powi.v3f64(<3 x double>, i32
declare <3 x float> @llvm.experimental.constrained.sin.v3f32(<3 x float>,
metadata, metadata)
declare <3 x double> @llvm.experimental.constrained.sin.v3f64(<3 x double>,
met
@@ -151,6 +151,17 @@ entry:
ret double %result
}
+; Verify that tan(42.0) isn't simplified when the rounding mode is unknown.
+; CHECK-LABEL: ftan
+; CHECK: call double @llvm.experimental.constrained.tan
+define double @ftan() #0 {
+entry:
+ %result = call double @llvm.expe
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/94559
>From 51247e430ad49c4729e2e3664104367b13fbad9e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 24 May 2024 10:01:52 -0400
Subject: [PATCH 1/2] [clang] Add tanf16 builtin and support for tan
constrained in
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/94559
>From 51247e430ad49c4729e2e3664104367b13fbad9e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 24 May 2024 10:01:52 -0400
Subject: [PATCH 1/3] [clang] Add tanf16 builtin and support for tan
constrained in
farzonl wrote:
@efriedma-quic If you have time could you take a look at this pr. It is the
same as the one you review just with more tests across more targets. Problem
from the first merge was because the target base changes were tied up in the
x86 backend change. Since those have merged t
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/94559
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farzonl wrote:
> This broke building wasi-libc, with a crash:
>
> ```
> Stack dump:
> 0.Program arguments: /builds/worker/fetches/clang/bin/clang-19 -cc1
> -triple wasm32-unknown-wasi -emit-obj -disable-free -clear-ast-before-backend
> -disable-llvm-verifier -discard-value-names -main-file
farzonl wrote:
@aeubanks The issue you are seeing here is because only aarch64 and x86
backends have tan intrinsic lowering support. This shouldn't be a regression
because there never was a llvm.tan.v2f32 for ARMv7. That still needs to be
add. Can you show me how you could have generated `l
farzonl wrote:
It seems like we have four options here. We can drop the `def Tan :
FPMathTemplate, LibBuiltin<"math.h">` builtins so no `Builtin::BItanf` or
`Builtin::BItanl` in cgbuitlin switch case. That wouldn't solve the
SLPVectorizer case but doesn't expose it either unless you use a
farzonl wrote:
> Can we change the target-independent bits of the tan() implementation in the
> backend so it doesn't require each target to explicitly request that tan()
> needs to be expanded? It should be possible to adjust the code in
> TargetLoweringBase.cpp a bit so FTAN defaults to bein
farzonl wrote:
> Usually when new ISD nodes are added they are expanded for all types, so that
> every backend will get at least working code even if it is not optimal. The
> targets can then come along and override the defaults for the types they are
> interested in, to get better results.
>
farzonl wrote:
PR https://github.com/llvm/llvm-project/pull/95518/files should address all
backends.
Also SLPVectorizer was disabled for tan so I put out PR
https://github.com/llvm/llvm-project/pull/95517
https://github.com/llvm/llvm-project/pull/94559
@@ -0,0 +1,29 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpExtInstImport "GLSL.std.450"
farzonl wrote:
make this: `;
@@ -0,0 +1,29 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpExtInstImport "GLSL.std.450"
+
+define noundef float @rsqrt_float(float noun
@@ -0,0 +1,29 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpExtInstImport "GLSL.std.450"
+
+define noundef float @rsqrt_float(float noun
@@ -62,4 +62,5 @@ let TargetPrefix = "spv" in {
def int_spv_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty]>;
def int_spv_lerp : Intrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty,
LLVMMatchType<0>,LLVMMatchType<0>],
[IntrNoMem, IntrWillReturn] >;
+ def int_spv_
https://github.com/farzonl approved this pull request.
LGTM, code looka right, just a few more tests needed.
https://github.com/llvm/llvm-project/pull/95849
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https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/95849
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/95999
This change is part of this proposal:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
This is part 3 of 4 PRs. It sets the ground work for using the intrinsics in
HLSL.
Add HLSL frontend apis fo
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