https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/66973
>From 141c9aa7f9b1a6f7b4f877a82c4ccf92ae2b8287 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Wed, 20 Sep 2023 22:58:08 -0400
Subject: [PATCH] Changes to support running tests for Windows arm64 asan 1.
Differ
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/66973
>From 141c9aa7f9b1a6f7b4f877a82c4ccf92ae2b8287 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Wed, 20 Sep 2023 22:58:08 -0400
Subject: [PATCH] Changes to support running tests for Windows arm64 asan 1.
Differ
@@ -18015,38 +18015,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
Value *S = EmitScalarExpr(E->getArg(2));
-llvm::Type *Xty = X->getType();
-llvm::Type
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/84526
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@@ -5254,7 +5250,11 @@ bool CheckAllArgsHaveFloatRepresentation(Sema *S,
CallExpr *TheCall) {
QualType ExpectedType = S->Context.FloatTy;
for (unsigned i = 0; i < TheCall->getNumArgs(); ++i) {
QualType PassedType = TheCall->getArg(i)->getType();
-if (!PassedType->h
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84526
>From 7dde8faaad046b715027a0f9fb772af90b6ffb30 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 7 Mar 2024 20:48:46 -0500
Subject: [PATCH 1/4] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change im
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84820
>From a46ecdee6356e744a80f3c29748e7c3482a89760 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:17:35 -0400
Subject: [PATCH 1/3] [HLSL] Implement `rsqrt` intrinsic This change implements
#70
@@ -0,0 +1,105 @@
+; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
+
+; Make sure dxil operation function calls for any are generated for float and
half.
+
+; CHECK:icmp ne i1 %{{.*}}, false
farzonl wrote:
That was my thinking as well, but all the other tests i
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/84526
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>From 9d3ae7bb5c40d2323a74c9d467c6c38f468ad038 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 14:27:21 -0400
Subject: [PATCH 1/4] rebase PR, add error checking for rsqrt
---
clang/include/cl
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https://github.com/llvm/llvm-project/pull/84927
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>From b21e8806ccc559d4326e26432cdce8ba13dc0984 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:28:49 -0400
Subject: [PATCH 1/2] [HLSL] implement the `isinf` intrinsic This change
implements
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84927
>From b21e8806ccc559d4326e26432cdce8ba13dc0984 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:28:49 -0400
Subject: [PATCH 1/2] [HLSL] implement the `isinf` intrinsic This change
implements
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/84820
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>From c240a73ea6edc4e7697ca3c7e4012849ec9a3583 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 16:54:12 -0400
Subject: [PATCH 1/3] address merge conflict
---
clang/include/clang/Basic/Builtin
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>From 3f515637fc87a41db1df4ea7627679c7dd75503a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 18:53:33 -0400
Subject: [PATCH 1/2] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change i
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84526
>From 3f515637fc87a41db1df4ea7627679c7dd75503a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 18:53:33 -0400
Subject: [PATCH 1/3] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change i
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/84526
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85424
closes #70071
- `CGBuiltin.cpp` - Add the unsigned\generic clamp intrinsic emitter.
- `IntrinsicsDirectX.td` - add the `dx.clamp` & `dx.uclamp` intrinsics
- `DXILIntrinsicExpansion.cpp` - add the `clamp` instructi
@@ -0,0 +1,186 @@
+//===- DXILIntrinsicExpansion.cpp - Prepare LLVM Module for DXIL
encoding--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -132,12 +134,60 @@ static bool expandRcpIntrinsic(CallInst *Orig) {
return true;
}
+static Intrinsic::ID getCorrectMaxIntrinsic(Type *elemTy,
+Intrinsic::ID clampIntrinsic) {
farzonl wrote:
Will do.
As an asid
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/85424
>From 681f4bbbc4aba08e285864ded62a7f01e178bf38 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 15:26:26 -0400
Subject: [PATCH 1/3] [HLSL] Implement the intrinsic
---
clang/include/clang/Basi
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/85424
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85662
this implements part 1 of 2 for #83626
- `CGBuiltin.cpp` - modified to have seperate cases for signed and unsigned
integers.
- `SemaChecking.cpp` - modified to prevent the generation of a double dot
product intr
@@ -39,11 +39,44 @@ static bool isIntrinsicExpansion(Function &F) {
case Intrinsic::dx_uclamp:
case Intrinsic::dx_lerp:
case Intrinsic::dx_rcp:
+ case Intrinsic::dx_sdot:
+ case Intrinsic::dx_udot:
return true;
}
return false;
}
+static bool expandIntegerD
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/85662
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https://github.com/llvm/llvm-project/pull/85662
>From e7738ae379375ed40558b2e93cc67a5a726aadbc Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 15 Mar 2024 18:19:52 -0400
Subject: [PATCH 1/2] [DXIL] implement dot intrinsic lowering for integers this
imp
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/85662
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farzonl wrote:
> Hi @farzonl, your commit is causing at least one test failure on a build bot:
> https://lab.llvm.org/buildbot/#/builders/139/builds/61732
>
> ```
> TEST 'Clang :: SemaHLSL/BuiltIns/dot-errors.hlsl' FAILED
>
> Exit Code: 1
> Command Out
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85839
This change fixes a test case failure caused by pr #85662
>From 7c2833dc32d8d2573454cba99b9a2c65a166d702 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 19 Mar 2024 14:01:29 -0400
Subject: [PATCH] This c
farzonl wrote:
@nico @dyung @llvm-beanz this pr should fix the build break:
https://github.com/llvm/llvm-project/pull/85839/files
https://github.com/llvm/llvm-project/pull/85662
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farzonl wrote:
> Also failing on http://45.33.8.238/linux/133623/step_7.txt
>
> It's been broken for over an hour now. Time to revert and fix async?
I have a PR up to fix this, but I would be equally happy with just adding an
XFAIL to SemaHLSL/BuiltIns/dot-errors.hlsl if you feel like my PR wo
farzonl wrote:
I'm confident this change fixes the build break:
```bash
python ../debug-llvm-build/bin/llvm-lit -sv clang/test/SemaHLSL/
llvm-lit:
/mnt/DevDrive/projects/llvm-project/llvm/utils/lit/lit/llvm/config.py:502:
note: using clang: /mnt/DevDrive/projects/debug-llvm-build/bin/clang
Te
farzonl wrote:
builds should be back to green all 51 checks passed:
https://github.com/llvm/llvm-project/commit/3ff67d8c8069b9f42efcbe90ad7edeb6d8117a31
https://github.com/llvm/llvm-project/pull/85839
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86071
Completes #83626
- `CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit `dot2`,
`dot3`, and `dot4` intrinsics based on element count
- `IntrinsicsDirectX.td` - for floating point add `dot2`, `dot3
https://github.com/farzonl edited
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@@ -2239,6 +2239,39 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl,
unsigned BuiltinID,
return true;
ICEArguments &= ~(1 << ArgNo);
}
+ // if the call has the elementwise attribute, then
+ // make sure that an elementwise expr is emitted.
+ if (FDecl->has
@@ -2239,6 +2239,39 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl,
unsigned BuiltinID,
return true;
ICEArguments &= ~(1 << ArgNo);
}
+ // if the call has the elementwise attribute, then
+ // make sure that an elementwise expr is emitted.
+ if (FDecl->has
farzonl wrote:
@robincaloudis Thanks this is what I was looking for.
https://github.com/llvm/llvm-project/pull/86407
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https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/86407
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farzonl wrote:
> @llvm-beanz, thanks for the review. I miss write access. Can you merge the
> PR? Thanks.
I got you!
https://github.com/llvm/llvm-project/pull/86407
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https://github.com/farzonl requested changes to this pull request.
This isn't going to work. You have to also fix the tests aswell.
https://github.com/llvm/llvm-project/pull/86440
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https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/86440
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86555
fixes #86551
closes #86552
Thanks to #86440 and #86407 it makes more sense for us to do type checks early
via Sema to prevent the generation of invalid intrinsics.
>From 8d2d3399cbd69da3af62e5b67ae2785f1edbce
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86560
completes #86187
- fix hlsl_intrinsic to cover the correct cases
- move to using `__builtin_elementwise_sqrt`
- add lowering of `Intrinsic::sqrt` to dxilop 24.
>From 5d8b1439d0e6967a4827d60ca39f49a2ad975af7 Mon S
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86071
>From db83effd2e9498fd7fd507b748a423390acefd5e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 19 Mar 2024 17:29:55 -0400
Subject: [PATCH 1/2] Add Float `Dot` Intrinsic Lowering Completes #83626 -
`CGBuil
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>From 29a8e760f348c5a3e4fbd0fa25b2711e12eab301 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 25 Mar 2024 14:10:07 -0400
Subject: [PATCH 1/2] [HLSL] prevent generation of double intrinsics via the
builti
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86720
fixes #86719
- `SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse`
- `hlsl_intrinsics.h` - remove signed `reversebits` apis
>From 0535f804c10c2c1a089a4c3c061d39b01f0ac0ee Mon Sep
@@ -54,31 +29,6 @@ uint16_t4 test_bitreverse_ushort4(uint16_t4 p0)
}
#endif
-// CHECK: define noundef i32 @
-// CHECK: call i32 @llvm.bitreverse.i32(
-int test_bitreverse_int(int p0)
-{
- return reversebits(p0);
-}
farzonl wrote:
errors specifically
`er
@@ -54,31 +29,6 @@ uint16_t4 test_bitreverse_ushort4(uint16_t4 p0)
}
#endif
-// CHECK: define noundef i32 @
-// CHECK: call i32 @llvm.bitreverse.i32(
-int test_bitreverse_int(int p0)
-{
- return reversebits(p0);
-}
farzonl wrote:
I noticed the same thin
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 0535f804c10c2c1a089a4c3c061d39b01f0ac0ee Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH] [HLSL] enforce unsigned types for reversebits fixes #86719
`SemaC
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 13296921ee46ab93d703eb7446479ce8aa7fadce Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH] [HLSL] enforce unsigned types for reversebits fixes #86719
`SemaC
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 13296921ee46ab93d703eb7446479ce8aa7fadce Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH 1/2] [HLSL] enforce unsigned types for reversebits fixes
#86719 `S
https://github.com/farzonl closed
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farzonl wrote:
I was writing up a ticket for floor and ceil. Nice catch!
https://godbolt.org/z/q9a644e6W.
https://github.com/llvm/llvm-project/pull/86932
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@@ -1,12 +1,13 @@
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6
farzonl wrote:
So keep in mind there are some double cases that are valid for hlsl. so always
check via dxc which can be easily used via
[hlsl.godbolt](https://hlsl.godbolt.org/).
https://github.com/llvm/llvm-project/pull/86932
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@@ -1,12 +1,13 @@
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6
@@ -1,12 +1,13 @@
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6
https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/86932
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farzonl wrote:
> thanks for review! can you merge that?
Our process is two reviewers. I will after one more person takes a look.
https://github.com/llvm/llvm-project/pull/86932
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https://github.com/farzonl closed
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/87034
DO NOT MERGE
This is part of a proposal for how to unify spir-v and DirectX intrinsics.
The issue tracking this work is: #83882
>From 8f7fb8ece073c251f78a2133b42d8baccb89c7f3 Mon Sep 17 00:00:00 2001
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?= ,
Nathan =?utf-8?q?Gauër?=
Message-ID:
In-Reply-To:
@@ -5803,6 +5887,15 @@ RValue CodeGenFu
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/87078
fixes #86999
>From bbb30f792bb9fb28f68079146783d6e8d1f0682b Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 29 Mar 2024 10:44:37 -0400
Subject: [PATCH] [HLSL][DXIL] HLSL's `round` should follow `roundeven
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/87078
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@@ -18317,6 +18307,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
ArrayRef{Op0}, nullptr, "dx.rsqrt");
}
+ case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
+auto *CI = EmitRu
@@ -18317,6 +18307,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
ArrayRef{Op0}, nullptr, "dx.rsqrt");
}
+ case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
+auto *CI = EmitRu
farzonl wrote:
Hi @marcauberer The change looks good. I'm 99% sure this won't have an effect
on the SPIRV backend, however there is still that 1% chance it does.
The tests I want to check landed in this PR
https://github.com/llvm/llvm-project/pull/85979/files
For convenience this is what you
https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/87131
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farzonl wrote:
minor nit pick, you don't have to do this one: could you make the HLSL prefix
first. It helps with some bookeeping we are doing.
https://github.com/llvm/llvm-project/pull/87131
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DO NOT MERGE
This is part of a proposal for how to unify spir-v and DirectX intrinsics.
The issue tracking this work is: #83882
>From 02a78955fc1ccb78690b0cd87de51f73cf8785de Mon Sep 17 00:00:00 2001
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
farzonl wrote:
this is a simple memchanism since we are only do
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>From dcf4896ca4d86a34a731f31e7dc42e271a62a02f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/c
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>From dcf4896ca4d86a34a731f31e7dc42e271a62a02f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 1/2] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/inclu
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>From 47518b4172cef216f1cc84e54b65e979b4c679c2 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 1/2] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/inclu
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@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===---
@@ -0,0 +1,44 @@
+
+//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,44 @@
+
+//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/81190
This change implements #70073
HLSL has a dot intrinsic defined here:
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-dot
The intrinsic itself is defined as a HLSL_LANG LangBuiltin i
@@ -4518,6 +4518,12 @@ def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void*(unsigned char)";
}
+def HLSLDotProduct : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_dot"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
+ let Pro
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