MrSidims wrote:
Tagging @svenvh to be aware of the discussion. I personally don't have a strong
opinion at the moment of what should be a default. Currently [SPIR-V To LLVM
translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator) picks
"Device" as the default (translation of the atom
@@ -251,6 +251,24 @@ SPIRV::MemorySemantics::MemorySemantics
getMemSemantics(AtomicOrdering Ord) {
llvm_unreachable(nullptr);
}
+SPIRV::Scope::Scope getMemScope(const LLVMContext &Ctx, SyncScope::ID ID) {
+ SmallVector SSNs;
+ Ctx.getSyncScopeNames(SSNs);
+
+ StringRef M
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https://github.com/llvm/llvm-project/pull/106429
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@@ -58,7 +58,35 @@ class SPIRVTargetCodeGenInfo : public
CommonSPIRTargetCodeGenInfo {
SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
: CommonSPIRTargetCodeGenInfo(std::make_unique(CGT)) {}
void setCUDAKernelCallingConvention(const FunctionType *&FT) const overri
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MrSidims wrote:
> There's nothing new to do here. This has always existed
@arsenm here is a small experiment, I've compiled the following OpenCL code:
```
struct S {
char i8_3[3];
};
kernel void test(global struct S *p, float3 v)
{
int3 tmp;
frexp(v, &tmp);
tmp += 1;
p->i8_3[0]
MrSidims wrote:
> with vanilla upstream, please see
You mean the translator, right? I don't think that SPIR-V backend should follow
its practices especially when we could do better.
> At a glance, it seems like an issue around handling vec3s, which are odd,
> but, probably; the BE should prob
MrSidims wrote:
Don't get me wrong, what I'm saying is not an objection against the patch, but
rather an attempt to test the waters :)
https://github.com/llvm/llvm-project/pull/110695
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https://lis
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MrSidims wrote:
> InstCombine's primary function is a canonicalization pass. You shouldn't be
> modifying it for specifically SPIRV optimizations (with the exception of
> SPIRV intrinsic support). SPIRV specific transforms belong in later backend
> IR passes
Does it mean, that the reasoning b
https://github.com/MrSidims commented:
Thanks, it should make LLVM IR after optimizations more translatable in SPIR-V!
Few questions though:
1. Usually (or at least AFAIK) optimization passes won't consider datalayout
automatically, as LLVM defines datalayout not as a contract set by the
front
MrSidims wrote:
> You want spirv, not spir
Thanks! Yet the result is the same.
> Do you plan to go over LLVM passes adding this check?
So guess answer to my question would be: "no" :)
https://github.com/llvm/llvm-project/pull/110695
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@@ -193,6 +194,33 @@ void AMDGCN::Linker::constructLldCommand(Compilation &C,
const JobAction &JA,
Lld, LldArgs, Inputs, Output));
}
+// For SPIR-V the inputs for the job are device AMDGCN SPIR-V flavoured bitcode
+// and the output is
@@ -193,6 +194,33 @@ void AMDGCN::Linker::constructLldCommand(Compilation &C,
const JobAction &JA,
Lld, LldArgs, Inputs, Output));
}
+// For SPIR-V the inputs for the job are device AMDGCN SPIR-V flavoured bitcode
+// and the output is
Nathan =?utf-8?q?Gau=C3=ABr?=
Message-ID:
In-Reply-To:
https://github.com/MrSidims approved this pull request.
LGTM
Guess the PR description should be updated
https://github.com/llvm/llvm-project/pull/116636
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Nathan =?utf-8?q?Gauër?=
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MrSidims wrote:
I agree with Sven. We mustn't reuse llvm-spirv's tests format in other
repositories.
https://github.com/llvm/llvm-project/pull/120266
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https://github.com/MrSidims approved this pull request.
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@@ -0,0 +1,501 @@
+//===- LowerGPUIntrinsic.cpp
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
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@@ -0,0 +1,501 @@
+//===- LowerGPUIntrinsic.cpp
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
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MrSidims wrote:
> Thank you for the feedback! I might not be getting the question right (case
> in which I apologise in advance!), but I think that for "vanilla" SPIR-V i.e.
> not vendor flavoured one, where one strictly has to deal with Extensions /
> non-core capabilities, we probably would
MrSidims wrote:
Hi @ZijunZhaoCCK , sorry, I'm quite late for the party, but may I ask you some
questions?
We want to be able to distinguish between Vulkan and OpenCL environments in
[SPIR-V
backend](https://github.com/intel/llvm/tree/sycl/llvm/lib/Target/SPIRV), so we
could be able to pick b
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