Author: Craig Topper
Date: 2020-06-25T22:55:36-07:00
New Revision: a7db230d752be4a104c496eb68a82a5acb4bb35c
URL:
https://github.com/llvm/llvm-project/commit/a7db230d752be4a104c496eb68a82a5acb4bb35c
DIFF:
https://github.com/llvm/llvm-project/commit/a7db230d752be4a104c496eb68a82a5acb4bb35c.diff
Author: Craig Topper
Date: 2020-06-26T00:14:58-07:00
New Revision: 12665f28129a7aefc635dc36d6fe0ad26583dd8a
URL:
https://github.com/llvm/llvm-project/commit/12665f28129a7aefc635dc36d6fe0ad26583dd8a
DIFF:
https://github.com/llvm/llvm-project/commit/12665f28129a7aefc635dc36d6fe0ad26583dd8a.diff
Author: Craig Topper
Date: 2020-06-26T16:45:44-07:00
New Revision: d298acde828f4abc5e7c82ba1f6092890d910097
URL:
https://github.com/llvm/llvm-project/commit/d298acde828f4abc5e7c82ba1f6092890d910097
DIFF:
https://github.com/llvm/llvm-project/commit/d298acde828f4abc5e7c82ba1f6092890d910097.diff
Author: Craig Topper
Date: 2020-06-26T23:32:17-07:00
New Revision: 9e8b5a20e9ec66df71e6540ee6720cbde339a7ae
URL:
https://github.com/llvm/llvm-project/commit/9e8b5a20e9ec66df71e6540ee6720cbde339a7ae
DIFF:
https://github.com/llvm/llvm-project/commit/9e8b5a20e9ec66df71e6540ee6720cbde339a7ae.diff
Author: Craig Topper
Date: 2020-06-28T11:06:40-07:00
New Revision: 20a60f46f505fc790e126b8b860c689870355f36
URL:
https://github.com/llvm/llvm-project/commit/20a60f46f505fc790e126b8b860c689870355f36
DIFF:
https://github.com/llvm/llvm-project/commit/20a60f46f505fc790e126b8b860c689870355f36.diff
Author: Craig Topper
Date: 2020-04-20T21:31:44-07:00
New Revision: 68b2e507e4fdf2776e568e95d27ce1ff54097476
URL:
https://github.com/llvm/llvm-project/commit/68b2e507e4fdf2776e568e95d27ce1ff54097476
DIFF:
https://github.com/llvm/llvm-project/commit/68b2e507e4fdf2776e568e95d27ce1ff54097476.diff
Author: Craig Topper
Date: 2020-04-24T11:01:22-07:00
New Revision: 0ed5b0d517cb781d4949cc4bfa9854bc276ee13a
URL:
https://github.com/llvm/llvm-project/commit/0ed5b0d517cb781d4949cc4bfa9854bc276ee13a
DIFF:
https://github.com/llvm/llvm-project/commit/0ed5b0d517cb781d4949cc4bfa9854bc276ee13a.diff
Author: Craig Topper
Date: 2020-04-27T22:17:03-07:00
New Revision: a58b62b4a2b96c31b49338b262b609db746449e8
URL:
https://github.com/llvm/llvm-project/commit/a58b62b4a2b96c31b49338b262b609db746449e8
DIFF:
https://github.com/llvm/llvm-project/commit/a58b62b4a2b96c31b49338b262b609db746449e8.diff
Author: Craig Topper
Date: 2020-04-30T18:17:01-07:00
New Revision: af28e02e74fbc9f955d292c19fa6dc790386bc4b
URL:
https://github.com/llvm/llvm-project/commit/af28e02e74fbc9f955d292c19fa6dc790386bc4b
DIFF:
https://github.com/llvm/llvm-project/commit/af28e02e74fbc9f955d292c19fa6dc790386bc4b.diff
Author: Craig Topper
Date: 2020-08-06T00:20:46-07:00
New Revision: 504a197fe54de83be791ea0aa2ed290f6b9285b0
URL:
https://github.com/llvm/llvm-project/commit/504a197fe54de83be791ea0aa2ed290f6b9285b0
DIFF:
https://github.com/llvm/llvm-project/commit/504a197fe54de83be791ea0aa2ed290f6b9285b0.diff
Author: Craig Topper
Date: 2020-08-06T13:18:15-07:00
New Revision: e1cad4234cf3a3d0747c140e135e413ece22cf63
URL:
https://github.com/llvm/llvm-project/commit/e1cad4234cf3a3d0747c140e135e413ece22cf63
DIFF:
https://github.com/llvm/llvm-project/commit/e1cad4234cf3a3d0747c140e135e413ece22cf63.diff
Author: Craig Topper
Date: 2020-08-06T13:18:15-07:00
New Revision: 4df38a5589f6fa23e161a76bdaa3180ad053791e
URL:
https://github.com/llvm/llvm-project/commit/4df38a5589f6fa23e161a76bdaa3180ad053791e
DIFF:
https://github.com/llvm/llvm-project/commit/4df38a5589f6fa23e161a76bdaa3180ad053791e.diff
Author: Craig Topper
Date: 2020-08-12T10:45:27-07:00
New Revision: a7a06ded8b0635268b5db218b3aca0b5b2bfb04a
URL:
https://github.com/llvm/llvm-project/commit/a7a06ded8b0635268b5db218b3aca0b5b2bfb04a
DIFF:
https://github.com/llvm/llvm-project/commit/a7a06ded8b0635268b5db218b3aca0b5b2bfb04a.diff
Author: Craig Topper
Date: 2020-08-12T11:43:46-07:00
New Revision: 2b8ad6b6040833f4f8702721ebaa7749e5c23e60
URL:
https://github.com/llvm/llvm-project/commit/2b8ad6b6040833f4f8702721ebaa7749e5c23e60
DIFF:
https://github.com/llvm/llvm-project/commit/2b8ad6b6040833f4f8702721ebaa7749e5c23e60.diff
Author: Craig Topper
Date: 2020-08-12T12:37:23-07:00
New Revision: 5c1fe4e20f887286baac6989943a0875e12834fe
URL:
https://github.com/llvm/llvm-project/commit/5c1fe4e20f887286baac6989943a0875e12834fe
DIFF:
https://github.com/llvm/llvm-project/commit/5c1fe4e20f887286baac6989943a0875e12834fe.diff
Author: Craig Topper
Date: 2020-08-18T12:33:40-07:00
New Revision: 6b1f9f2bd4437910804d571284b7c5bb66eac250
URL:
https://github.com/llvm/llvm-project/commit/6b1f9f2bd4437910804d571284b7c5bb66eac250
DIFF:
https://github.com/llvm/llvm-project/commit/6b1f9f2bd4437910804d571284b7c5bb66eac250.diff
Author: Craig Topper
Date: 2020-05-05T21:12:30-07:00
New Revision: 0fac1c19128106b6d65d349a5ed22fedacab520c
URL:
https://github.com/llvm/llvm-project/commit/0fac1c19128106b6d65d349a5ed22fedacab520c
DIFF:
https://github.com/llvm/llvm-project/commit/0fac1c19128106b6d65d349a5ed22fedacab520c.diff
Author: Craig Topper
Date: 2020-05-06T14:23:04-07:00
New Revision: 9bb9ff09573cf9178341f76a97e2a85b99cc7ae1
URL:
https://github.com/llvm/llvm-project/commit/9bb9ff09573cf9178341f76a97e2a85b99cc7ae1
DIFF:
https://github.com/llvm/llvm-project/commit/9bb9ff09573cf9178341f76a97e2a85b99cc7ae1.diff
Author: Craig Topper
Date: 2020-05-06T14:58:53-07:00
New Revision: 16c800b8b7155b531b53da0ca18b81980ac6a45b
URL:
https://github.com/llvm/llvm-project/commit/16c800b8b7155b531b53da0ca18b81980ac6a45b
DIFF:
https://github.com/llvm/llvm-project/commit/16c800b8b7155b531b53da0ca18b81980ac6a45b.diff
Author: Scott Constable
Date: 2020-05-11T13:08:35-07:00
New Revision: e97a3e5d9d428c4d455fa1b1982728bb71f0c397
URL:
https://github.com/llvm/llvm-project/commit/e97a3e5d9d428c4d455fa1b1982728bb71f0c397
DIFF:
https://github.com/llvm/llvm-project/commit/e97a3e5d9d428c4d455fa1b1982728bb71f0c397.dif
Author: ctopper
Date: Thu Sep 22 01:13:33 2016
New Revision: 282137
URL: http://llvm.org/viewvc/llvm-project?rev=282137&view=rev
Log:
[X86] Fix some illegal rounding modes in some builtin test cases to ones that
would properly compile to valid assembly.
Modified:
cfe/trunk/test/CodeGen/avx51
Author: ctopper
Date: Thu Sep 22 23:48:31 2016
New Revision: 282228
URL: http://llvm.org/viewvc/llvm-project?rev=282228&view=rev
Log:
[AVX-512] Add initial support for checking rounding mode arguments of builtins.
The backend can't encode all possible values of the argument and will fail
isel. C
Author: ctopper
Date: Thu Sep 22 23:48:27 2016
New Revision: 282227
URL: http://llvm.org/viewvc/llvm-project?rev=282227&view=rev
Log:
[X86] Split up the single switch statement in Sema::CheckX86BuiltinFunctionCall
into different switches or ifs for each type of check.
This in preparation for a n
Author: ctopper
Date: Sat Oct 1 16:03:46 2016
New Revision: 283053
URL: http://llvm.org/viewvc/llvm-project?rev=283053&view=rev
Log:
[AVX-512] Add _MM_FROUND_NO_EXC to test cases that pass a rounding mode
intrinsics. This is preparation for a follow up commit that will check validity
of roundin
Author: ctopper
Date: Sat Oct 1 16:03:50 2016
New Revision: 283054
URL: http://llvm.org/viewvc/llvm-project?rev=283054&view=rev
Log:
[AVX-512] Check rounding mode for builtins that take one. Rounding mode should
be either _MM_FROUND_CUR_DIRECTION or a 2-bit rounding mode ORed with
_MM_FROUND_NO
Author: ctopper
Date: Sun Oct 2 12:43:00 2016
New Revision: 283073
URL: http://llvm.org/viewvc/llvm-project?rev=283073&view=rev
Log:
[AVX-512] Use native IR for masked 512-bit add/sub/mul/div ps/pd intrinsics
when rounding mode isn't used.
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
But this also increases the size of the builtin table too right? Since
StringRef is twice the size of a pointer.
~Craig
On Tue, Oct 11, 2016 at 11:40 AM, Mehdi Amini via cfe-commits <
cfe-commits@lists.llvm.org> wrote:
> This is temporary: the last patch of my series of patches adds the
> conste
Author: ctopper
Date: Sat Nov 25 11:32:12 2017
New Revision: 318985
URL: http://llvm.org/viewvc/llvm-project?rev=318985&view=rev
Log:
[X86] Use separate builtins for fma4 scalar intrinsics. Use negations to remove
some of the scalar fma3 builtins.
fma4 instructions zero the upper bits of the xmm
Author: ctopper
Date: Tue Nov 28 10:00:32 2017
New Revision: 319195
URL: http://llvm.org/viewvc/llvm-project?rev=319195&view=rev
Log:
[Target] Make a copy of TargetOptions feature list before sorting during CodeGen
Currently CodeGen is calling std::sort on the features vector in TargetOptions
fo
Author: ctopper
Date: Mon Dec 11 13:09:16 2017
New Revision: 320418
URL: http://llvm.org/viewvc/llvm-project?rev=320418&view=rev
Log:
[Docs] Regenerate command line documentation.
Modified:
cfe/trunk/docs/ClangCommandLineReference.rst
Modified: cfe/trunk/docs/ClangCommandLineReference.rst
UR
Author: ctopper
Date: Mon Dec 11 13:09:19 2017
New Revision: 320419
URL: http://llvm.org/viewvc/llvm-project?rev=320419&view=rev
Log:
[Driver][CodeGen] Add -mprefer-vector-width driver option and attribute during
CodeGen.
This adds a new command line option -mprefer-vector-width to specify a
pr
Author: Craig Topper
Date: 2022-09-06T14:46:35-07:00
New Revision: 7440e2274fbd840178cf73060201e6a2e225c5d1
URL:
https://github.com/llvm/llvm-project/commit/7440e2274fbd840178cf73060201e6a2e225c5d1
DIFF:
https://github.com/llvm/llvm-project/commit/7440e2274fbd840178cf73060201e6a2e225c5d1.diff
Author: Craig Topper
Date: 2022-09-06T16:24:23-07:00
New Revision: d3b99703427e354fe9eae6c19971f5b1d77aa2b4
URL:
https://github.com/llvm/llvm-project/commit/d3b99703427e354fe9eae6c19971f5b1d77aa2b4
DIFF:
https://github.com/llvm/llvm-project/commit/d3b99703427e354fe9eae6c19971f5b1d77aa2b4.diff
Author: Craig Topper
Date: 2022-09-07T10:31:48-07:00
New Revision: 9ea7e4f7c14267ada92aa6e04d7f460d2562bf19
URL:
https://github.com/llvm/llvm-project/commit/9ea7e4f7c14267ada92aa6e04d7f460d2562bf19
DIFF:
https://github.com/llvm/llvm-project/commit/9ea7e4f7c14267ada92aa6e04d7f460d2562bf19.diff
Author: Craig Topper
Date: 2022-09-07T11:34:33-07:00
New Revision: cc14e195e79d0c1eca2190acffbddd53d0898317
URL:
https://github.com/llvm/llvm-project/commit/cc14e195e79d0c1eca2190acffbddd53d0898317
DIFF:
https://github.com/llvm/llvm-project/commit/cc14e195e79d0c1eca2190acffbddd53d0898317.diff
Author: Craig Topper
Date: 2022-09-14T14:51:37-07:00
New Revision: 6106a6d7fe48ac26bc39621898b90766e2a10bd0
URL:
https://github.com/llvm/llvm-project/commit/6106a6d7fe48ac26bc39621898b90766e2a10bd0
DIFF:
https://github.com/llvm/llvm-project/commit/6106a6d7fe48ac26bc39621898b90766e2a10bd0.diff
https://github.com/topperc commented:
Do we need to add the "experimental" feature to RISCVFeatures.td? If the
feature string shows up in the function attributes, won't the backend print
that it doesn't recognize the feature name when it parses the string?
https://github.com/llvm/llvm-project/
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/69559
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topperc wrote:
> Here's a simple-ish example:
>
> ```llvm
> ; Transforms/InstCombine/add.ll
>
> define i5 @zext_sext_not(i4 %x) {
> %zx = zext i4 %x to i5
> %notx = xor i4 %x, 15
> %snotx = sext i4 %notx to i5
> %r = add i5 %zx, %snotx
> ret i5 %r
> }
> =>
> define i5 @zext_sext_not(i
topperc wrote:
@nikic is something like this the right fix
```
diff --git a/llvm/lib/Analysis/ValueTracking.cpp
b/llvm/lib/Analysis/ValueTracking.cpp
index 8c29c242215d..b03a56c922de 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -235,8 +235,11 @@
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/74284
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@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
@@ -1715,6 +1716,130 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This function will try to re-use multi-lib if they are compat
https://github.com/topperc edited
https://github.com/llvm/llvm-project/pull/73765
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https://github.com/topperc edited
https://github.com/llvm/llvm-project/pull/73765
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Author: Craig Topper
Date: 2023-12-06T22:25:33-08:00
New Revision: 6c39ab90524ee791b0c6adaf8a305bf68ed4cd7f
URL:
https://github.com/llvm/llvm-project/commit/6c39ab90524ee791b0c6adaf8a305bf68ed4cd7f
DIFF:
https://github.com/llvm/llvm-project/commit/6c39ab90524ee791b0c6adaf8a305bf68ed4cd7f.diff
@@ -1715,6 +1716,129 @@ static void findCSKYMultilibs(const Driver &D, const
llvm::Triple &TargetTriple,
Result.Multilibs = CSKYMultilibs;
}
+/// Extend the multi-lib re-use selection mechanism for RISC-V.
+/// This funciton will try to re-use multi-lib if they are compat
@@ -485,7 +485,7 @@ class RVVIntrinsic {
// RVVRequire should be sync'ed with target features, but only
// required features used in riscv_vector.td.
-enum RVVRequire : uint16_t {
+enum RVVRequire : unsigned int {
topperc wrote:
Use uint32_t since we're count
@@ -370,6 +371,10 @@ bool
RISCVTargetInfo::handleTargetFeatures(std::vector &Features,
ISAInfo = std::move(*ParseResult);
}
+ if (std::find(Features.begin(), Features.end(), "+experimental") !=
topperc wrote:
Use llvm::find. Or even better, maybe we c
@@ -28,6 +28,7 @@ class RISCVTargetInfo : public TargetInfo {
protected:
std::string ABI, CPU;
std::unique_ptr ISAInfo;
+ bool HasExperimental = false;
topperc wrote:
Can this be private like `FastUnalignedAccess`?
https://github.com/llvm/llvm-project/pu
https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/74906
Rather than using size_t, use unsigned. We don't have more than 4 billion
intrinsics.
>From 0067a9c7260591904578c3f6648bb925630dcfa7 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Fri, 8 Dec 2023 17:06:36 -0
https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/74907
These names are never used so just waste a lot of memory. If do need them ever,
it would be better to store pointers to the StringMapEntry objects that store
the same strings.
>From 776adf52c610904938e966503eb0
topperc wrote:
Can we reverse this patch? Keep isRVVSizelessBuiltinType and remove isRVVType.
The implementation of isRVVSizelessBuiltinType is more efficient according to
some profiling. At least on Release+Asserts build
https://github.com/llvm/llvm-project/pull/67089
https://github.com/topperc approved this pull request.
LGTM
Related question. If there is an -mcpu on the command line and target attribute
changes the march, do we keep the original CPU in the -target-cpu attribute or
drop it. The reason for all those negative features from the driver was to
Author: Craig Topper
Date: 2023-12-08T18:44:26-08:00
New Revision: b88b480640f173582ffbfd2faae690f2bc895d14
URL:
https://github.com/llvm/llvm-project/commit/b88b480640f173582ffbfd2faae690f2bc895d14
DIFF:
https://github.com/llvm/llvm-project/commit/b88b480640f173582ffbfd2faae690f2bc895d14.diff
topperc wrote:
> Can we reverse this patch? Keep isRVVSizelessBuiltinType and remove
> isRVVType. The implementation of isRVVSizelessBuiltinType is more efficient
> according to some profiling. At least on Release+Asserts build
I went ahead and committed that change.
https://github.com/llvm/l
https://github.com/topperc closed
https://github.com/llvm/llvm-project/pull/74907
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https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/74949
We can decompose the type into ElementType and MinSize and use those to perform
the checks. This is more efficient than using isRVVType.
This also fixes a bug that we didn't disallow vbool64_t on Zve32x.
>From
https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/74950
If vector isn't enabled at all, we might hit one of the earlier
diagnostics and the requires Zve32x diagnostic. The Zve32x diagnostic
would be redundant.
This is tsacked on #74949
>From 95fd6615dd54e838f81562f64
Author: Craig Topper
Date: 2023-12-09T14:02:58-08:00
New Revision: 5c8755f9f40e5b5f4e26a9a0fdb4993cb8a57202
URL:
https://github.com/llvm/llvm-project/commit/5c8755f9f40e5b5f4e26a9a0fdb4993cb8a57202
DIFF:
https://github.com/llvm/llvm-project/commit/5c8755f9f40e5b5f4e26a9a0fdb4993cb8a57202.diff
https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/74950
>From 95fd6615dd54e838f81562f648738feba635a66c Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Sat, 9 Dec 2023 12:38:43 -0800
Subject: [PATCH 1/3] [RISCV] Refactor checkRVVTypeSupport to use
BuiltinVectorTypeI
Author: Craig Topper
Date: 2023-12-09T14:38:03-08:00
New Revision: bf9125294da1f3cf03a88356e068725c6f88bea6
URL:
https://github.com/llvm/llvm-project/commit/bf9125294da1f3cf03a88356e068725c6f88bea6
DIFF:
https://github.com/llvm/llvm-project/commit/bf9125294da1f3cf03a88356e068725c6f88bea6.diff
topperc wrote:
> > LGTM
>
> >
>
> > Related question. If there is an -mcpu on the command line and target
> > attribute changes the march, do we keep the original CPU in the -target-cpu
> > attribute or drop it. The reason for all those negative features from the
> > driver was to make the
Author: Craig Topper
Date: 2023-12-11T11:58:58-08:00
New Revision: 1bbf7225c1f0dde8c59c8acfc0b54999391df184
URL:
https://github.com/llvm/llvm-project/commit/1bbf7225c1f0dde8c59c8acfc0b54999391df184
DIFF:
https://github.com/llvm/llvm-project/commit/1bbf7225c1f0dde8c59c8acfc0b54999391df184.diff
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/74213
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Author: Craig Topper
Date: 2023-12-11T12:21:09-08:00
New Revision: 13662211c32cb9034b67d7fe0fb73fdebd15471e
URL:
https://github.com/llvm/llvm-project/commit/13662211c32cb9034b67d7fe0fb73fdebd15471e
DIFF:
https://github.com/llvm/llvm-project/commit/13662211c32cb9034b67d7fe0fb73fdebd15471e.diff
topperc wrote:
What is the use case for someone to write the maybe ops directly? Wouldn't you
program to the extensions built on top of them like Zicfiss?
https://github.com/llvm/llvm-project/pull/74824
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Author: Craig Topper
Date: 2023-12-11T12:45:27-08:00
New Revision: 0d44c9f99a7d9d9444d1656ca52fa0784c711680
URL:
https://github.com/llvm/llvm-project/commit/0d44c9f99a7d9d9444d1656ca52fa0784c711680
DIFF:
https://github.com/llvm/llvm-project/commit/0d44c9f99a7d9d9444d1656ca52fa0784c711680.diff
Author: Craig Topper
Date: 2023-12-11T12:45:27-08:00
New Revision: 4a11222f50dbe95e61c7cd7ddc2de8b3e87cddd7
URL:
https://github.com/llvm/llvm-project/commit/4a11222f50dbe95e61c7cd7ddc2de8b3e87cddd7
DIFF:
https://github.com/llvm/llvm-project/commit/4a11222f50dbe95e61c7cd7ddc2de8b3e87cddd7.diff
@@ -8262,6 +8262,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
topperc wrote:
> LGTM. It will be great if you could add RISCV test too, but please don't let
> this block you.
RISC-V uses custom lowering. We should already have tests.
https://github.com/llvm/llvm-project/pull/67301
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cf
@@ -736,7 +736,7 @@ R"(All available -march extensions for RISC-V
xventanacondops 1.0
Experimental extensions
-zicfilp 0.2 This is a long dummy description
+zicfilp 0.4 This is a long dummy description
topper
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/72216
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@@ -1101,7 +1101,7 @@ enum PredefinedTypeIDs {
///
/// Type IDs for non-predefined types will start at
/// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 500;
+const unsigned NUM_PREDEF_TYPE_IDS = 502;
topperc wrote:
Why is 502, but 600 is bad?
ht
https://github.com/topperc edited
https://github.com/llvm/llvm-project/pull/72370
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@@ -1101,7 +1101,7 @@ enum PredefinedTypeIDs {
///
/// Type IDs for non-predefined types will start at
/// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 500;
+const unsigned NUM_PREDEF_TYPE_IDS = 502;
topperc wrote:
Then your commit message should
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/67089
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topperc wrote:
test?
https://github.com/llvm/llvm-project/pull/73091
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/73091
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/71399
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topperc wrote:
@preames do you have concerns with this patch?
https://github.com/llvm/llvm-project/pull/65934
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/70355
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/68296
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https://github.com/topperc requested changes to this pull request.
I believe we need to update `Sema::checkRVVTypeSupport` too
https://github.com/llvm/llvm-project/pull/71140
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@@ -6046,6 +6046,13 @@ void Sema::checkRVVTypeSupport(QualType Ty,
SourceLocation Loc, Decl *D) {
!TI.hasFeature("zvfh") && !TI.hasFeature("zvfhmin"))
Diag(Loc, diag::err_riscv_type_requires_extension, D)
<< Ty << "zvfh or zvfhmin";
+ // Check if enabled zfb
@@ -6046,6 +6046,12 @@ void Sema::checkRVVTypeSupport(QualType Ty,
SourceLocation Loc, Decl *D) {
!TI.hasFeature("zvfh") && !TI.hasFeature("zvfhmin"))
Diag(Loc, diag::err_riscv_type_requires_extension, D)
<< Ty << "zvfh or zvfhmin";
+ // Check if enabled zvf
https://github.com/topperc edited
https://github.com/llvm/llvm-project/pull/71140
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/71140
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https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/74906
>From 83579bb66f49f8f41f5030f861704b5c97729805 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Fri, 8 Dec 2023 17:06:36 -0800
Subject: [PATCH 1/2] [RISCV] Reduce the size of the index used for RVV
intrinsics.
topperc wrote:
> LGTM - though maybe use uint32_t?
>
> Looking at this code, the whole Intrinsics map vs OverloadIntrinsic map
> structure loops to have heavy redundancy and could be greatly simplified.
> Maybe a follow up?
Did you have a specific idea in mind? I'm skeptical that the `8` is t
https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/74906
>From 83579bb66f49f8f41f5030f861704b5c97729805 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Fri, 8 Dec 2023 17:06:36 -0800
Subject: [PATCH 1/3] [RISCV] Reduce the size of the index used for RVV
intrinsics.
https://github.com/topperc updated
https://github.com/llvm/llvm-project/pull/74906
>From 83579bb66f49f8f41f5030f861704b5c97729805 Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Fri, 8 Dec 2023 17:06:36 -0800
Subject: [PATCH 1/4] [RISCV] Reduce the size of the index used for RVV
intrinsics.
https://github.com/topperc closed
https://github.com/llvm/llvm-project/pull/74906
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https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/73765
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@@ -143,6 +143,22 @@ on support follow.
``Zve64f`` Supported
``Zve64d`` Supported
``Zvfh`` Supported
+ ``Zvbb`` Assembly Support
topperc wrote:
Please alphabetize this list correctly.
https://github.com/llvm/llvm
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