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LGTM pending comments from other reviewers
https://github.com/llvm/llvm-project/pull/141830
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@@ -0,0 +1,11 @@
+// RUN: cir-opt %s -verify-diagnostics -split-input-file
+
+!s32i = !cir.int
bcardosolopes wrote:
Seems like you forgot to remove this file
https://github.com/llvm/llvm-project/pull/141369
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@@ -276,4 +276,46 @@ def ConstPtrAttr : CIR_Attr<"ConstPtr", "ptr",
[TypedAttrInterface]> {
}];
}
+//===--===//
+// ConstComplexAttr
+//===---
https://github.com/bcardosolopes approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/143028
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https://github.com/llvm/llvm-project/pull/143192
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@@ -1641,6 +1641,34 @@ LogicalResult cir::VecTernaryOp::verify() {
return success();
}
+//===--===//
+// ComplexCreateOp
+//===--===//
+
+L
https://github.com/bcardosolopes approved this pull request.
LGTM, some nits
https://github.com/llvm/llvm-project/pull/143192
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@@ -2231,4 +2231,48 @@ def VecTernaryOp : CIR_Op<"vec.ternary",
let hasVerifier = 1;
}
+//===--===//
+// BaseClassAddrOp
+//===--===//
+
+d
https://github.com/bcardosolopes approved this pull request.
Great!
https://github.com/llvm/llvm-project/pull/143214
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https://github.com/bcardosolopes approved this pull request.
LGTM, with a non-blocking suggestion
https://github.com/llvm/llvm-project/pull/143195
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https://github.com/llvm/llvm-project/pull/143253
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https://github.com/bcardosolopes approved this pull request.
Thanks for this folder, one nit and good to go
https://github.com/llvm/llvm-project/pull/143260
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https://github.com/bcardosolopes approved this pull request.
LGTM, one nit
https://github.com/llvm/llvm-project/pull/143262
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https://github.com/llvm/llvm-project/pull/143304
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@@ -1599,6 +1599,14 @@ LogicalResult cir::VecShuffleOp::verify() {
<< " and " << getResult().getType() << " don't match";
}
+ const uint64_t maxValidIndex =
+ getVec1().getType().getSize() + getVec2().getType().getSize() - 1;
+ for (const auto
@@ -1580,9 +1580,46 @@ OpFoldResult cir::VecExtractOp::fold(FoldAdaptor
adaptor) {
}
//===--===//
-// VecShuffle
+// VecShuffleOp
//===--
@@ -77,12 +77,8 @@ void foo() {
// CIR: %[[VEC_F:.*]] = cir.alloca !cir.vector<4 x !s32i>,
!cir.ptr>, ["f", init]
// CIR: %[[VEC_G:.*]] = cir.alloca !cir.vector<4 x !s32i>,
!cir.ptr>, ["g", init]
// CIR: %[[VEC_H:.*]] = cir.alloca !cir.vector<4 x !s32i>,
!cir.ptr>, ["h", ini
@@ -0,0 +1,81 @@
+#include "CIRGenBuilder.h"
+#include "CIRGenFunction.h"
+
+#include "clang/AST/StmtVisitor.h"
+
+using namespace clang;
+using namespace clang::CIRGen;
+
+namespace {
+class ComplexExprEmitter : public StmtVisitor
{
+ CIRGenFunction &cgf;
+ CIRGenBuilderTy &bu
@@ -1533,6 +1533,17 @@ LogicalResult cir::GetMemberOp::verify() {
// VecCreateOp
//===--===//
+OpFoldResult cir::VecCreateOp::fold(FoldAdaptor adaptor) {
+ auto elements = getElements();
+ if (std::any_of(e
https://github.com/bcardosolopes approved this pull request.
LGTM, some nits
https://github.com/llvm/llvm-project/pull/143377
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@@ -312,8 +329,47 @@ RValue CIRGenFunction::emitCall(const CIRGenFunctionInfo
&funcInfo,
assert(!cir::MissingFeatures::opCallBitcastArg());
cirCallArgs[argNo] = v;
} else {
- assert(!cir::MissingFeatures::opCallAggregateArgs());
- cgm.errorNYI("emitCa
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https://github.com/llvm/llvm-project/pull/143377
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@@ -274,6 +274,12 @@ class AggValueSlot {
public:
enum IsZeroed_t { IsNotZeroed, IsZeroed };
+ /// ignored - Returns an aggregate value slot indicating that the aggregate
bcardosolopes wrote:
"ignored - " not necessary
https://github.com/llvm/llvm-project
bcardosolopes wrote:
> This did require some work to ensure that the cache doesn't have 'vars' that
> aren't inside of the loop, but Sema is taking care of that with a warning
Because it's a warning, is there anything we can add to existing verifiers to
sanity check the invariant?
https://git
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https://github.com/llvm/llvm-project/pull/146915
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https://github.com/bcardosolopes approved this pull request.
Overall looks good, one question and one nit!
https://github.com/llvm/llvm-project/pull/146915
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@@ -1204,7 +1204,41 @@ class CIRGenFunction : public CIRGenTypeCache {
void updateLoopOpParallelism(mlir::acc::LoopOp &op, bool isOrphan,
OpenACCDirectiveKind dk);
+ // The OpenACC 'cache' construct actually applies to the 'loop' if present.
https://github.com/bcardosolopes commented:
Thanks for updating the other attributes names as well, way to go.
https://github.com/llvm/llvm-project/pull/145178
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@@ -662,13 +665,17 @@ static void printCallCommon(mlir::Operation *op,
}
printer << "(" << ops << ")";
+ if (isNothrow)
+printer << " nothrow";
bcardosolopes wrote:
Fair, this should go away if we end up using a tablegen based printer/parser at
some
https://github.com/bcardosolopes edited
https://github.com/llvm/llvm-project/pull/145178
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@@ -227,26 +227,24 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
//======//
cir::CallOp createCallOp(mlir::Location loc, mlir::SymbolRefAttr callee,
- mlir::Type returnTyp
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https://github.com/llvm/llvm-project/pull/145178
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@@ -662,13 +665,17 @@ static void printCallCommon(mlir::Operation *op,
}
printer << "(" << ops << ")";
+ if (isNothrow)
+printer << " nothrow";
bcardosolopes wrote:
and here!
https://github.com/llvm/llvm-project/pull/145178
_
@@ -611,6 +611,9 @@ static mlir::ParseResult parseCallCommon(mlir::OpAsmParser
&parser,
if (parser.parseRParen())
return mlir::failure();
+ if (parser.parseOptionalKeyword("nothrow").succeeded())
+result.addAttribute("nothrow", mlir::UnitAttr::get(parser.getContext
https://github.com/bcardosolopes commented:
Thanks for the changes, more comments!
https://github.com/llvm/llvm-project/pull/145178
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@@ -77,17 +77,38 @@ void CIRGenFunction::emitAggregateStore(mlir::Value value,
Address dest) {
builder.createStore(*currSrcLoc, value, dest);
}
+static void addAttributesFromFunctionProtoType(CIRGenBuilderTy &builder,
+ mlir::Na
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https://github.com/llvm/llvm-project/pull/145792
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@@ -95,6 +95,7 @@ CIRGenModule::CIRGenModule(mlir::MLIRContext &mlirContext,
// TODO(CIR): Should be updated once TypeSizeInfoAttr is upstreamed
const unsigned sizeTypeSize =
astContext.getTypeSize(astContext.getSignedSizeType());
+ SizeSizeInBytes = astContext.toCha
https://github.com/bcardosolopes approved this pull request.
LGTM, one minor comment
https://github.com/llvm/llvm-project/pull/145802
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@@ -95,6 +95,7 @@ CIRGenModule::CIRGenModule(mlir::MLIRContext &mlirContext,
// TODO(CIR): Should be updated once TypeSizeInfoAttr is upstreamed
const unsigned sizeTypeSize =
astContext.getTypeSize(astContext.getSignedSizeType());
+ SizeSizeInBytes = astContext.toCha
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https://github.com/llvm/llvm-project/pull/145802
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https://github.com/bcardosolopes approved this pull request.
We need to update some of the entries because they are old now, so a few
comments on that, otherwise LGTM
https://github.com/llvm/llvm-project/pull/148545
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@@ -72,4 +72,14 @@ def CIRFlattenCFG : Pass<"cir-flatten-cfg"> {
let dependentDialects = ["cir::CIRDialect"];
}
+def LoweringPrepare : Pass<"cir-lowering-prepare"> {
+ let summary = "Preparation work before lowering to LLVM dialect";
bcardosolopes wrote:
`
@@ -72,4 +72,14 @@ def CIRFlattenCFG : Pass<"cir-flatten-cfg"> {
let dependentDialects = ["cir::CIRDialect"];
}
+def LoweringPrepare : Pass<"cir-lowering-prepare"> {
+ let summary = "Preparation work before lowering to LLVM dialect";
+ let description = [{
+This pass d
https://github.com/bcardosolopes approved this pull request.
https://github.com/llvm/llvm-project/pull/148704
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@@ -2521,6 +2521,32 @@ def ComplexImagOp : CIR_Op<"complex.imag", [Pure]> {
let hasFolder = 1;
}
+//===--===//
+// ComplexAddOp
+//===--===
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https://github.com/llvm/llvm-project/pull/147365
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@@ -2521,6 +2521,32 @@ def ComplexImagOp : CIR_Op<"complex.imag", [Pure]> {
let hasFolder = 1;
}
+//===--===//
+// ComplexAddOp
+//===--===
@@ -82,12 +85,17 @@ llvm::LogicalResult
prepareCIRModuleDataLayout(mlir::ModuleOp mod,
// Data layout is fully determined by the target triple. Here we only pass
the
// triple to get the data layout.
+ llvm::IntrusiveRefCntPtr diagID(
+ new clang::DiagnosticIDs);
+
https://github.com/bcardosolopes approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/146927
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https://github.com/bcardosolopes approved this pull request.
LGTM pending my last comment
https://github.com/llvm/llvm-project/pull/147209
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@@ -82,12 +85,17 @@ llvm::LogicalResult
prepareCIRModuleDataLayout(mlir::ModuleOp mod,
// Data layout is fully determined by the target triple. Here we only pass
the
// triple to get the data layout.
+ llvm::IntrusiveRefCntPtr diagID(
+ new clang::DiagnosticIDs);
+
bcardosolopes wrote:
> if transformations like this should be implemented in cir-simplify
For this specific one I agree with @xlauko, it could have already come out of
CIRGen like this without any hurting source fidelity. For anything slightly
more cir-simplify should be used. We just went thr
@@ -2066,6 +2066,11 @@ LogicalResult cir::ComplexRealOp::verify() {
}
OpFoldResult cir::ComplexRealOp::fold(FoldAdaptor adaptor) {
+ if (auto complexCreateOp = dyn_cast_or_null(
+ getOperand().getDefiningOp())) {
+return complexCreateOp.getOperand(0);
+ }
--
@@ -1669,6 +1669,90 @@ def GetGlobalOp : CIR_Op<"get_global",
}];
}
+//===--===//
+// SetBitfieldOp
+//===--===//
+
+def SetBitfieldOp : CI
@@ -2384,6 +2385,82 @@ mlir::LogicalResult
CIRToLLVMComplexImagOpLowering::matchAndRewrite(
return mlir::success();
}
+mlir::LogicalResult CIRToLLVMSetBitfieldOpLowering::matchAndRewrite(
+cir::SetBitfieldOp op, OpAdaptor adaptor,
+mlir::ConversionPatternRewriter &r
@@ -1669,6 +1669,90 @@ def GetGlobalOp : CIR_Op<"get_global",
}];
}
+//===--===//
+// SetBitfieldOp
+//===--===//
+
+def SetBitfieldOp : CI
https://github.com/bcardosolopes approved this pull request.
Nice, tks!
https://github.com/llvm/llvm-project/pull/147628
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@@ -9543,6 +9543,48 @@ bool
SpecialMemberDeletionInfo::shouldDeleteForSubobjectCall(
if (DiagKind == -1)
return false;
+ if (this->S.Context.getLangOpts().CPlusPlus26 && inUnion() &&
+ CSM == CXXSpecialMemberKind::Destructor) {
+// [class.dtor]/7 In C++26, a d
@@ -9543,6 +9543,48 @@ bool
SpecialMemberDeletionInfo::shouldDeleteForSubobjectCall(
if (DiagKind == -1)
return false;
+ if (this->S.Context.getLangOpts().CPlusPlus26 && inUnion() &&
+ CSM == CXXSpecialMemberKind::Destructor) {
+// [class.dtor]/7 In C++26, a d
https://github.com/bcardosolopes edited
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https://github.com/bcardosolopes commented:
Added more reviewers and some nits
https://github.com/llvm/llvm-project/pull/146815
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@@ -9543,6 +9543,48 @@ bool
SpecialMemberDeletionInfo::shouldDeleteForSubobjectCall(
if (DiagKind == -1)
return false;
+ if (this->S.Context.getLangOpts().CPlusPlus26 && inUnion() &&
+ CSM == CXXSpecialMemberKind::Destructor) {
+// [class.dtor]/7 In C++26, a d
https://github.com/bcardosolopes approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/148962
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@@ -515,5 +515,35 @@ def BitfieldInfoAttr : CIR_Attr<"BitfieldInfo",
"bitfield_info"> {
];
}
+//===--===//
+// AddressPointAttr
+//===--==
https://github.com/bcardosolopes approved this pull request.
LGTM after existing comments are addressed, nothing else to add on my part.
https://github.com/llvm/llvm-project/pull/148999
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@@ -2219,6 +2219,50 @@ def CIR_TrapOp : CIR_Op<"trap", [Terminator]> {
let assemblyFormat = "attr-dict";
}
+//===--===//
+// ArrayCtor
+//===--
@@ -805,4 +805,50 @@ bool CIRGenFunction::shouldNullCheckClassCastValue(const
CastExpr *ce) {
return true;
}
+/// Computes the length of an array in elements, as well as the base
+/// element type and a properly-typed first element pointer.
+mlir::Value
+CIRGenFunction::emi
@@ -22,15 +24,97 @@ struct LoweringPreparePass : public
LoweringPrepareBase {
void runOnOperation() override;
void runOnOp(Operation *op);
+ void lowerArrayCtor(ArrayCtor op);
};
} // namespace
-void LoweringPreparePass::runOnOp(Operation *op) {}
+void LoweringPrep
@@ -2219,6 +2219,50 @@ def CIR_TrapOp : CIR_Op<"trap", [Terminator]> {
let assemblyFormat = "attr-dict";
}
+//===--===//
+// ArrayCtor
+//===--
@@ -1053,6 +1053,68 @@ LValue CIRGenFunction::emitMemberExpr(const MemberExpr
*e) {
llvm_unreachable("Unhandled member declaration!");
}
+/// Evaluate an expression into a given memory location.
+void CIRGenFunction::emitAnyExprToMem(const Expr *e, Address location,
+
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