@@ -16542,12 +16542,64 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+ // The lambda function converts builtin_cpu_is function into directly
+ // returning false or true, or it gets and checks the informati
@@ -16542,12 +16542,64 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+ // The lambda function converts builtin_cpu_is function into directly
+ // returning false or true, or it gets and checks the informati
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/80069
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https://github.com/amy-kwan commented:
Group review comments.
https://github.com/llvm/llvm-project/pull/80069
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@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -362,8 +362,16 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public
TargetInfo {
// We support __builtin_cpu_supports/__builtin_cpu_is on targets that
// have Glibc since it is Glibc that provides the HWCAP[2] in the auxv.
+ static constexpr int MINIMUM_AIX_OS_MAJO
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
amy-
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -16542,12 +16542,64 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+ // The lambda function converts builtin_cpu_is function into directly
+ // returning false or true, or it gets and checks the informati
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -904,8 +904,18 @@ bool PPCTargetInfo::validateCpuSupports(StringRef
FeatureStr) const {
}
bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const {
+ llvm::Triple Triple = getTriple();
amy-kwan wrote:
Check clang-format for indentation.
https://githu
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -82,8 +82,7 @@ void MCSectionXCOFF::printSwitchToSection(const MCAsmInfo
&MAI, const Triple &T,
}
if (isCsect() && getMappingClass() == XCOFF::XMC_TD) {
-assert((getKind().isBSSExtern() || getKind().isBSSLocal()) &&
- "Unexepected section kind for toc-dat
@@ -265,6 +269,62 @@ bool AIXTargetCodeGenInfo::initDwarfEHRegSizeTable(
return PPC_initDwarfEHRegSizeTable(CGF, Address, Is64Bit, /*IsAIX*/ true);
}
+void AIXTargetCodeGenInfo::setTargetAttributes(
+const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const
https://github.com/amy-kwan approved this pull request.
Two minor nits but also LGTM.
https://github.com/llvm/llvm-project/pull/67999
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https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/67999
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@@ -126,4 +126,61 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header
+// file: .
+#ifndef AIX_POWERPC_USE_SYS_CONF
+ #define AIX_POWERPC_USE_SYS_CONF
+ #defi
@@ -16542,12 +16542,62 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ // This lambda function converts builtin_cpu_is() into directly
+ // returning true o
@@ -126,4 +126,61 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header
+// file: .
+#ifndef AIX_POWERPC_USE_SYS_CONF
+ #define AIX_POWERPC_USE_SYS_CONF
+ #defi
@@ -126,4 +126,57 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of following value are found in the AIX header file
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+#define AIX_SYSCON_IMPL_IDX
@@ -16542,12 +16542,62 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ // This lambda function converts builtin_cpu_is() into directly
+ // returning true o
@@ -16542,12 +16542,62 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ // This lambda function converts builtin_cpu_is() into directly
amy-k
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/80069
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https://github.com/amy-kwan approved this pull request.
Aside from the comments about updating the assert in `SemaChecking.cpp` and the
two comments in `PPCTargetParser.def`, this also LGTM.
https://github.com/llvm/llvm-project/pull/80069
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https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/84132
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https://github.com/amy-kwan approved this pull request.
Thank you for addressing my comment!
I think I do not have any further comments, so unless if anyone has any other
comments LGTM.
https://github.com/llvm/llvm-project/pull/84132
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@@ -3362,6 +3362,65 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue
Op,
return LowerGlobalTLSAddressLinux(Op, DAG);
}
+/// updateForAIXShLibTLSModelOpt - Helper to initialize TLS model opt settings,
+/// and then apply the update.
+static void updateForAIXShLibT
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/88829
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@@ -6,6 +6,9 @@
// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls -S
-emit-llvm \
// RUN:%s -o - | FileCheck %s --check-prefix=CHECK-AIX_SMALL_LOCALEXEC_TLS
+// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-dynamic-tls -S
-emit-llvm \
https://github.com/amy-kwan approved this pull request.
LGTM as well.
https://github.com/llvm/llvm-project/pull/88829
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https://github.com/llvm/llvm-project/pull/84132
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https://github.com/amy-kwan approved this pull request.
LGTM after all the updates. Thanks!
https://github.com/llvm/llvm-project/pull/84132
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@@ -3362,6 +3367,54 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue
Op,
return LowerGlobalTLSAddressLinux(Op, DAG);
}
+/// updateForAIXShLibTLSModelOpt - Helper to initialize TLS model opt settings,
+/// and then apply the update.
+static void updateForAIXShLibT
https://github.com/amy-kwan approved this pull request.
I don't have any further comments. LGTM.
https://github.com/llvm/llvm-project/pull/82809
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https://github.com/amy-kwan approved this pull request.
LGTM for using `CGT.ConvertType()` like you did previously. I agree that if we
were to do a larger/refactoring patch, that can be separate since this PR fixes
the current codegen.
https://github.com/llvm/llvm-project/pull/104816
_
@@ -1292,8 +1291,9 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
unsigned Op = MI->getOpcode();
-// Change the opcode to load address for tocdata
-TmpInst.setOpcode(Op == PPC::ADDItocL8 ? PPC::ADDI8 : PPC::LA);
+// Change the opcode to load
@@ -6141,24 +6141,23 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
assert((isPPC64 || (isAIXABI && !isPPC64)) && "We are dealing with 64-bit"
" ELF/AIX or 32-bit AIX in the following.");
-// Transforms the ISD::TOC_ENTRY node for 32-bit AIX large code model m
@@ -479,14 +479,6 @@ static void addTocDataOptions(const llvm::opt::ArgList
&Args,
return false;
}();
- // Currently only supported for small code model.
- if (TOCDataGloballyinEffect &&
- (Args.getLastArgValue(options::OPT_mcmodel_EQ).equals("large") ||
-
@@ -6143,23 +6143,23 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
" ELF/AIX or 32-bit AIX in the following.");
// Transforms the ISD::TOC_ENTRY node for 32-bit AIX large code model mode,
-// or 64-bit medium (ELF-only), or large (ELF and AIX) code model code
Author: Amy Kwan
Date: 2021-10-06T08:49:37-05:00
New Revision: 49dbde9c9e5149bcc8b906f7dbd040be76a2a267
URL:
https://github.com/llvm/llvm-project/commit/49dbde9c9e5149bcc8b906f7dbd040be76a2a267
DIFF:
https://github.com/llvm/llvm-project/commit/49dbde9c9e5149bcc8b906f7dbd040be76a2a267.diff
LOG:
Author: Amy Kwan
Date: 2021-10-07T11:33:19-05:00
New Revision: 74b1ac7155a01e5d29cff612717f773da095d696
URL:
https://github.com/llvm/llvm-project/commit/74b1ac7155a01e5d29cff612717f773da095d696
DIFF:
https://github.com/llvm/llvm-project/commit/74b1ac7155a01e5d29cff612717f773da095d696.diff
LOG:
Author: Amy Kwan
Date: 2021-10-08T15:09:53-05:00
New Revision: 03bfddae5080f8b92d86342d68439c7f07838369
URL:
https://github.com/llvm/llvm-project/commit/03bfddae5080f8b92d86342d68439c7f07838369
DIFF:
https://github.com/llvm/llvm-project/commit/03bfddae5080f8b92d86342d68439c7f07838369.diff
LOG:
Author: Amy Kwan
Date: 2021-10-19T09:01:01-05:00
New Revision: 5eaf5b916146dff0a02d8d937e88d8fb128640d2
URL:
https://github.com/llvm/llvm-project/commit/5eaf5b916146dff0a02d8d937e88d8fb128640d2
DIFF:
https://github.com/llvm/llvm-project/commit/5eaf5b916146dff0a02d8d937e88d8fb128640d2.diff
LOG:
https://github.com/amy-kwan commented:
I'm not an expert here, but I think the change you made makes sense since the
`Ty` is supposed to be the first field.
Also, might be a dumb question, I saw we have 32-bit Linux run lines, but is
that still worth testing?
https://github.com/llvm/llvm-proj
https://github.com/amy-kwan commented:
For the most part, I think it looks good but I just have one comment about a
change that (I think) doesn't need to happen.
https://github.com/llvm/llvm-project/pull/118004
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@@ -473,7 +473,7 @@ class LLVM_LIBRARY_VISIBILITY PS3PPUTargetInfo : public
OSTargetInfo {
this->IntMaxType = TargetInfo::SignedLongLong;
this->Int64Type = TargetInfo::SignedLongLong;
this->SizeType = TargetInfo::UnsignedInt;
-this->resetDataLayout("E-m:e-p:32:
https://github.com/amy-kwan approved this pull request.
Thanks for clarifying my earlier comment. LGTM.
https://github.com/llvm/llvm-project/pull/118004
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https://github.com/amy-kwan approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/130324
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@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 3
; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -O1 -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machinein
@@ -43,63 +43,6 @@
// CHECK-CRBITS: "-target-feature" "+crbits"
-// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr10 -emit-llvm \
-// RUN: -S %s -o - | FileCheck %s --check-prefix=HAS-CRBITS
-// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr10 -mcr
@@ -117,5 +121,27 @@ StringRef getNormalizedPPCTuneCPU(const Triple &T,
StringRef CPUName) {
return getNormalizedPPCTargetCPU(T, CPUName);
}
+std::optional> getPPCDefaultTargetFeatures(const Triple &T,
+ StringRef CP
https://github.com/amy-kwan approved this pull request.
Makes sense and LGTM.
https://github.com/llvm/llvm-project/pull/139619
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@@ -1,20 +1,10 @@
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
// RUN: -mcpu=pwr10 -mrop-protect %s 2>&1 | FileCheck %s
--check-prefix=HASROP
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN: -mcpu=power10 -mrop-p
@@ -1,20 +1,10 @@
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
// RUN: -mcpu=pwr10 -mrop-protect %s 2>&1 | FileCheck %s
--check-prefix=HASROP
// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN: -mcpu=power10 -mrop-p
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