Author: Amy Kwan
Date: 2020-07-16T00:30:24-05:00
New Revision: fc55308628709bfc64b100dadf9a030fbb2afaee
URL:
https://github.com/llvm/llvm-project/commit/fc55308628709bfc64b100dadf9a030fbb2afaee
DIFF:
https://github.com/llvm/llvm-project/commit/fc55308628709bfc64b100dadf9a030fbb2afaee.diff
LOG:
Author: Amy Kwan
Date: 2020-07-22T13:27:05-05:00
New Revision: 08b4a50e39d8b8db17b8eddacba795e99304e418
URL:
https://github.com/llvm/llvm-project/commit/08b4a50e39d8b8db17b8eddacba795e99304e418
DIFF:
https://github.com/llvm/llvm-project/commit/08b4a50e39d8b8db17b8eddacba795e99304e418.diff
LOG:
Author: Amy Kwan
Date: 2020-07-22T17:58:14-05:00
New Revision: 5f110273954ac152c9690b6cdf2a2e46f8908f0a
URL:
https://github.com/llvm/llvm-project/commit/5f110273954ac152c9690b6cdf2a2e46f8908f0a
DIFF:
https://github.com/llvm/llvm-project/commit/5f110273954ac152c9690b6cdf2a2e46f8908f0a.diff
LOG:
Author: Amy Kwan
Date: 2020-07-24T19:22:39-05:00
New Revision: 74790a5dde9ae01b7e96bea0b2596ef37b5325bd
URL:
https://github.com/llvm/llvm-project/commit/74790a5dde9ae01b7e96bea0b2596ef37b5325bd
DIFF:
https://github.com/llvm/llvm-project/commit/74790a5dde9ae01b7e96bea0b2596ef37b5325bd.diff
LOG:
Author: Amy Kwan
Date: 2020-07-13T22:47:47-05:00
New Revision: 62f5ba624bfba5ccf4446737ad2bfb1fc013b376
URL:
https://github.com/llvm/llvm-project/commit/62f5ba624bfba5ccf4446737ad2bfb1fc013b376
DIFF:
https://github.com/llvm/llvm-project/commit/62f5ba624bfba5ccf4446737ad2bfb1fc013b376.diff
LOG:
Author: Amy Kwan
Date: 2020-06-18T16:23:56-05:00
New Revision: c45c1611303b4609016fa69c1c987ede3bf92006
URL:
https://github.com/llvm/llvm-project/commit/c45c1611303b4609016fa69c1c987ede3bf92006
DIFF:
https://github.com/llvm/llvm-project/commit/c45c1611303b4609016fa69c1c987ede3bf92006.diff
LOG:
Author: Amy Kwan
Date: 2020-06-20T18:29:16-05:00
New Revision: cc95635b1bf28e626b4c2ac296b0a0ca22ab3c91
URL:
https://github.com/llvm/llvm-project/commit/cc95635b1bf28e626b4c2ac296b0a0ca22ab3c91
DIFF:
https://github.com/llvm/llvm-project/commit/cc95635b1bf28e626b4c2ac296b0a0ca22ab3c91.diff
LOG:
Author: Amy Kwan
Date: 2020-06-22T21:09:34-05:00
New Revision: 19df9e2959cfa3f25d798bd842df798e2b75f1b2
URL:
https://github.com/llvm/llvm-project/commit/19df9e2959cfa3f25d798bd842df798e2b75f1b2
DIFF:
https://github.com/llvm/llvm-project/commit/19df9e2959cfa3f25d798bd842df798e2b75f1b2.diff
LOG:
Author: Amy Kwan
Date: 2020-06-24T16:03:45-05:00
New Revision: d82f26cc4bc7cb78f7ef327fa43a93e3d0ff9706
URL:
https://github.com/llvm/llvm-project/commit/d82f26cc4bc7cb78f7ef327fa43a93e3d0ff9706
DIFF:
https://github.com/llvm/llvm-project/commit/d82f26cc4bc7cb78f7ef327fa43a93e3d0ff9706.diff
LOG:
Author: Amy Kwan
Date: 2020-06-25T21:34:41-05:00
New Revision: e0c02dc9800ebd317d1369848f4e74c8f783533a
URL:
https://github.com/llvm/llvm-project/commit/e0c02dc9800ebd317d1369848f4e74c8f783533a
DIFF:
https://github.com/llvm/llvm-project/commit/e0c02dc9800ebd317d1369848f4e74c8f783533a.diff
LOG:
Author: Amy Kwan
Date: 2020-07-31T10:58:07-05:00
New Revision: c4e574323210feda1a3988e85fdd93b90a63d1b1
URL:
https://github.com/llvm/llvm-project/commit/c4e574323210feda1a3988e85fdd93b90a63d1b1
DIFF:
https://github.com/llvm/llvm-project/commit/c4e574323210feda1a3988e85fdd93b90a63d1b1.diff
LOG:
Author: Amy Kwan
Date: 2020-08-17T21:14:17-05:00
New Revision: c7ec3a7e338cd8e58424a66d29162e9b6a5847f7
URL:
https://github.com/llvm/llvm-project/commit/c7ec3a7e338cd8e58424a66d29162e9b6a5847f7
DIFF:
https://github.com/llvm/llvm-project/commit/c7ec3a7e338cd8e58424a66d29162e9b6a5847f7.diff
LOG:
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema &S,
SourceLocation Loc,
return false;
}
+/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
+/// This checks that the target supports __builtin_cpu_supports and
+/// that the string argum
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema &S,
SourceLocation Loc,
return false;
}
+/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
+/// This checks that the target supports __builtin_cpu_supports and
+/// that the string argum
https://github.com/amy-kwan commented:
Initial group code review comments.
https://github.com/llvm/llvm-project/pull/68919
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@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema &S,
SourceLocation Loc,
return false;
}
+/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
+/// This checks that the target supports __builtin_cpu_supports and
+/// that the string argum
@@ -359,6 +359,13 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public
TargetInfo {
bool isSPRegName(StringRef RegName) const override {
return RegName.equals("r1") || RegName.equals("x1");
}
+
+ // We support __builtin_cpu_supports/__builtin_cpu_is on targets that
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/68919
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https://github.com/amy-kwan commented:
Additional group code review comments.
https://github.com/llvm/llvm-project/pull/68919
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@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema &S,
SourceLocation Loc,
return false;
}
+/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
+/// This checks that the target supports __builtin_cpu_supports and
+/// that the string argum
@@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins()
const {
return llvm::ArrayRef(BuiltinInfo,
clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin);
}
+
+bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const {
--
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/66316
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@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
https://github.com/amy-kwan commented:
I imagine this will be updated after 4b932d84f48e0f3f42c769a5ca7ce6623ab62f2e
so I plan to review again after.
https://github.com/llvm/llvm-project/pull/66316
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@@ -1356,6 +1382,11 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
.addExpr(SymGotTlsGD));
return;
}
+ case PPC::GETtlsMOD32AIX:
+ case PPC::GETtlsMOD64AIX:
+// Transform: %r3 = GETtlsMODNNAIX %r3 (for NN == 32/64).
+// Into
@@ -231,12 +231,19 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
MCSymbolXCOFF *TCSym =
cast(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
- // On AIX, we have a region handle (symbol@m) and the variable offset
- /
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
amy-kwan wrote:
Maybe a silly question, but will this always contain the `
@@ -2385,6 +2385,13 @@ MCSection
*TargetLoweringObjectFileXCOFF::getSectionForExternalReference(
SmallString<128> Name;
getNameWithPrefix(Name, GO, TM);
+ // AIX TLS local-dynamic requires the setting for the specific symbol name.
amy-kwan wrote:
Maybe
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -1830,6 +1830,10 @@ void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) {
PPCTargetStreamer *TS =
static_cast(OutStreamer->getTargetStreamer());
+ if (static_cast(TM).hasGlibcHWCAPAccess())
amy-kwan wrote:
Can we add more documentation regarding
https://github.com/amy-kwan commented:
Additional group review comments.
https://github.com/llvm/llvm-project/pull/68919
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@@ -32,6 +32,7 @@ class PPCTargetMachine final : public LLVMTargetMachine {
std::unique_ptr TLOF;
PPCABI TargetABI;
Endian Endianness = Endian::NOT_DETECTED;
+ mutable bool HasGlibcHWCAPAccess = false;
amy-kwan wrote:
Question: Why does this need to be
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@@ -1,11 +1,16 @@
-// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s| FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s | FileCheck %s \
+// RUN: --check-prefix=CHECK-X86
+// RUN: %clang_cc1 -triple ppc64le-linux-gnu -emit-llvm < %s | File
https://github.com/amy-kwan commented:
Additional group review comments.
https://github.com/llvm/llvm-project/pull/68919
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@@ -15,38 +20,57 @@ int main(void) {
if (__builtin_cpu_supports("sse4.2"))
a("sse4.2");
- // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32,
i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0)
- // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD
https://github.com/amy-kwan approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/70661
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Author: Amy Kwan
Date: 2022-07-29T13:28:48-05:00
New Revision: 4e1fe968c9de73507a1bf0c8aa57e06be457816e
URL:
https://github.com/llvm/llvm-project/commit/4e1fe968c9de73507a1bf0c8aa57e06be457816e
DIFF:
https://github.com/llvm/llvm-project/commit/4e1fe968c9de73507a1bf0c8aa57e06be457816e.diff
LOG:
Author: Amy Kwan
Date: 2021-07-19T09:10:06-05:00
New Revision: dd5aa657a520adcff84bb6149dd20cd8a2c8c6c6
URL:
https://github.com/llvm/llvm-project/commit/dd5aa657a520adcff84bb6149dd20cd8a2c8c6c6
DIFF:
https://github.com/llvm/llvm-project/commit/dd5aa657a520adcff84bb6149dd20cd8a2c8c6c6.diff
LOG:
Author: Amy Kwan
Date: 2021-07-19T11:20:21-05:00
New Revision: 356300a3510c48f1f446cbdf580294b577435589
URL:
https://github.com/llvm/llvm-project/commit/356300a3510c48f1f446cbdf580294b577435589
DIFF:
https://github.com/llvm/llvm-project/commit/356300a3510c48f1f446cbdf580294b577435589.diff
LOG:
Author: Amy Kwan
Date: 2022-02-15T12:30:50-06:00
New Revision: 5dc0a1657be14df68bfc33deb2fb75476acdaec8
URL:
https://github.com/llvm/llvm-project/commit/5dc0a1657be14df68bfc33deb2fb75476acdaec8
DIFF:
https://github.com/llvm/llvm-project/commit/5dc0a1657be14df68bfc33deb2fb75476acdaec8.diff
LOG:
Author: Amy Kwan
Date: 2022-05-02T12:06:15-05:00
New Revision: 2534dc120a4c9468d9a0044665a50361089f0a4d
URL:
https://github.com/llvm/llvm-project/commit/2534dc120a4c9468d9a0044665a50361089f0a4d
DIFF:
https://github.com/llvm/llvm-project/commit/2534dc120a4c9468d9a0044665a50361089f0a4d.diff
LOG:
Author: Amy Kwan
Date: 2022-05-19T11:28:40-05:00
New Revision: c35ca3a1c78f693b749ad11742350b7fc6c5cd89
URL:
https://github.com/llvm/llvm-project/commit/c35ca3a1c78f693b749ad11742350b7fc6c5cd89
DIFF:
https://github.com/llvm/llvm-project/commit/c35ca3a1c78f693b749ad11742350b7fc6c5cd89.diff
LOG:
@@ -141,46 +149,98 @@ PPC_LNX_CPU("power10",47)
#define AIX_BUILTIN_PPC_TRUE 1
#define AIX_BUILTIN_PPC_FALSE 0
#define USE_SYS_CONF 2
-
- // Supported COMPARE_OP values.
- #define COMP_EQ 0
-
+ #define SYS_CALL 3
#endif
// The value of SUPPORT_METHOD can be AIX_BU
@@ -16570,32 +16570,53 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
#include "llvm/TargetParser/PPCTargetParser.def"
auto GenAIXPPCBuiltinCpuExpr = [&](unsigned SupportMethod, unsigned FieldIdx,
- unsigned CompOp,
+
amy-kwan wrote:
I believe this patch is causing some issues on two PPC bots. Would you be able
to help take a look?
https://lab.llvm.org/buildbot/#/builders/57/builds/33601/steps/5/logs/stdio
https://lab.llvm.org/buildbot/#/builders/36/builds/43759/steps/12/logs/stdio
https://github.com/llvm/ll
amy-kwan wrote:
> I'm confused as to how this code ever compiled in the first place... In each
> case, this is C++ code that's failing:
>
> ```
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_po
https://github.com/amy-kwan approved this pull request.
I've also tested this locally, and it resolves the issue I saw earlier on the
PPC bots.
https://github.com/llvm/llvm-project/pull/86131
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htt
@@ -4958,6 +4958,10 @@ def maix_small_local_exec_tls : Flag<["-"],
"maix-small-local-exec-tls">,
"where the offset from the TLS base is encoded as an "
"immediate operand (AIX 64-bit only). "
"This access sequence is not used for variables larg
@@ -3369,6 +3369,48 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize heu
@@ -3369,6 +3369,48 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize heu
@@ -848,6 +848,14 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;
if (Model == TLSModel::InitialExec)
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
+ // On AIX, TLS mode
@@ -848,6 +848,14 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;
if (Model == TLSModel::InitialExec)
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;
+ // On AIX, TLS mode
@@ -3369,6 +3369,48 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize heu
@@ -3369,6 +3369,48 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize heu
amy-kwan wrote:
Thanks @AaronBallman.
Not sure how I missed it, but I just noticed in my local build of
check-runtimes/check-all. This is also present on the following bot:
https://lab.llvm.org/buildbot/#/builders/57/builds/33656
https://github.com/llvm/llvm-project/pull/86131
amy-kwan wrote:
I have also found one more that is not related to the sanitizers, but when
`llvm-project/llvm/lib/IR/Core.cpp`:
https://lab.llvm.org/buildbot/#/builders/36/builds/43840/steps/12/logs/stdio
Would it be possible to also resolve this one, as well?
https://github.com/llvm/llvm-pr
amy-kwan wrote:
Thanks @Abhinkop for the patch! I have approved the compiler-rt patch since it
does appear to resolve the check-runtimes/check-all issue for the asan test
case.
If you also would like me to test a follow up patch for
`llvm-project/llvm/lib/IR/Core.cpp`, I would be happy to do
amy-kwan wrote:
> @amy-kwan I'm looking at it now. I will most probably raise a review some
> time later in the evening or tomorrow if I am not able to complete it today.
Sounds good, thank you so much, @Abhinkop!
https://github.com/llvm/llvm-project/pull/86131
amy-kwan wrote:
Hi @Abhinkop!
I was wondering if there was any progress regarding the patch to resolve the
stage 2 failure, as our bot is still red
(https://lab.llvm.org/buildbot/#/builders/36/builds/43929/steps/12/logs/stdio).
Please let me know if you would also like me to test any patches, a
Stefan =?utf-8?q?Gränitz?=
Message-ID:
In-Reply-To:
amy-kwan wrote:
Hi @weliveindetail!
I just wanted to give a heads up, that I believe
13078cbc3eeb0ae91c370ce0f604f7165b26e0c8 is causing a failure of the
clang-ppc64le-rhel bot:
https://lab.llvm.org/buildbot/#/builders/57/builds/33764/step
amy-kwan wrote:
This also fails on PPC, as well:
https://lab.llvm.org/buildbot/#/builders/36/builds/43998/steps/12/logs/stdio
https://github.com/llvm/llvm-project/pull/86339
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@@ -3369,6 +3369,59 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
bool Is64Bit = Subtarget.isPPC64();
bool HasAIXSmallLocalExecTLS = Subtarget.hasAIXSmallLocalExecTLS();
TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
+ // Initialize TLS
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@@ -0,0 +1,83 @@
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c |
FileCheck %s \
+// RUN: --check-prefix=CHECKBOOL
+
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cel
@@ -126,4 +126,57 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of following value are found in the AIX header file
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
amy-kwan wro
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -126,4 +126,57 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of following value are found in the AIX header file
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+#define AIX_SYSCON_IMPL_IDX
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -126,4 +126,57 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of following value are found in the AIX header file
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+#define AIX_SYSCON_IMPL_IDX
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -10347,6 +10347,8 @@ def err_x86_builtin_tile_arg_duplicate : Error<
def err_builtin_target_unsupported : Error<
"builtin is not supported on this target">;
+def err_builtin_aix_os_unsupported : Error<
+ "this builtin is available only in AIX 7.2 and later operating syst
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
am
@@ -904,8 +904,17 @@ bool PPCTargetInfo::validateCpuSupports(StringRef
FeatureStr) const {
}
bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const {
+ llvm::Triple Triple = getTriple();
+ if (Triple.isOSLinux()) {
amy-kwan wrote:
Can if we do somethin
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -0,0 +1,83 @@
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c |
FileCheck %s \
+// RUN: --check-prefix=CHECKBOOL
+
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cel
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -0,0 +1,83 @@
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c |
FileCheck %s \
+// RUN: --check-prefix=CHECKBOOL
+
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cel
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
https://github.com/amy-kwan commented:
I believe some of the test cases also require updates as a result of
https://github.com/llvm/llvm-project/pull/80162.
https://github.com/llvm/llvm-project/pull/66316
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https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/66316
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@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +164,94 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
https://github.com/amy-kwan edited
https://github.com/llvm/llvm-project/pull/77732
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https://github.com/amy-kwan commented:
I think the braces can also be omitted on the conditions within the `clang/*`
files.
https://github.com/llvm/llvm-project/pull/77732
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
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