https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/113281
>From 2b416dd0071d45be3f92671f0cb238091689a9dd Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 21 Oct 2024 17:15:47 +0100
Subject: [PATCH 1/3] [FMV][AArch64] Expand feature dependencies using
A
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/113281
>From 2b416dd0071d45be3f92671f0cb238091689a9dd Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 21 Oct 2024 17:15:47 +0100
Subject: [PATCH 1/3] [FMV][AArch64] Expand feature dependencies using
A
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/113281
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labrinea wrote:
I've left out the bf16 and i8mm dependencies fixup as they deserve a separate
patch. I will be merging this until the end of today if no one objects.
https://github.com/llvm/llvm-project/pull/113281
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/113281
>From 2b416dd0071d45be3f92671f0cb238091689a9dd Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 21 Oct 2024 17:15:47 +0100
Subject: [PATCH 1/4] [FMV][AArch64] Expand feature dependencies using
A
labrinea wrote:
Not sure who to add as reviewr on this one.
https://github.com/llvm/llvm-project/pull/115762
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labrinea wrote:
ping
https://github.com/llvm/llvm-project/pull/108383
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labrinea wrote:
> I don't quite get the code, but it seems that +mte or +mte2 may be emitted in
> disassembly and/or supported by the assembler?
They are supported in assembler for the sole purpose of providing more
informative error messages.
https://github.com/llvm/llvm-project/pull/109299
https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/110297
According to https://developer.arm.com/documentation/102105/latest Arm
Architecture Reference Manual for A-profile architecture: Known issues
2.206 D22789
In section C5.2.25 "SSBS, Speculative Store Bypass Saf
labrinea wrote:
Fix here -> https://github.com/llvm/llvm-project/pull/110291
https://github.com/llvm/llvm-project/pull/108383
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https://github.com/llvm/llvm-project/pull/101712
>From 2fe8ef63846989952a1c72b83114aabe6f36637a Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Fri, 2 Aug 2024 17:32:23 +0100
Subject: [PATCH] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V.
labrinea wrote:
Just letting you know that I have reopened
https://github.com/llvm/llvm-project/pull/101712 as a draft just to demonstrate
that backwards compatibility can be preserved if we split the features
(previously I thought it wasn't possible, but I found a way). However I
couldn't co
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/108383
>From 50820f4f3ded438162a33eabca84c5077fd2a5aa Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 12 Sep 2024 13:55:24 +0100
Subject: [PATCH] [FMV][AArch64] Remove feature sha1 from FMV.
Sha1 has
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/108024
>From b6abb4f0fcf50d7498a6f0d0ef8b75808c8b1eb1 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 10 Sep 2024 14:02:17 +0100
Subject: [PATCH] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata.
Or
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/108024
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/108024
>From b6abb4f0fcf50d7498a6f0d0ef8b75808c8b1eb1 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 10 Sep 2024 14:02:17 +0100
Subject: [PATCH 1/2] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata.
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/101712
>From 2fe8ef63846989952a1c72b83114aabe6f36637a Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Fri, 2 Aug 2024 17:32:23 +0100
Subject: [PATCH 1/2] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64
@@ -3682,6 +3682,8 @@ static const struct Extension {
{"sve2-bitperm", {AArch64::FeatureSVE2BitPerm}},
{"sve2p1", {AArch64::FeatureSVE2p1}},
{"ls64", {AArch64::FeatureLS64}},
+{"ls64_v", {AArch64::FeatureLS64_V}},
+{"ls64_accdata", {AArch64::FeatureLS64_ACCD
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/108024
>From b6abb4f0fcf50d7498a6f0d0ef8b75808c8b1eb1 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 10 Sep 2024 14:02:17 +0100
Subject: [PATCH 1/2] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata.
https://github.com/labrinea edited
https://github.com/llvm/llvm-project/pull/108024
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https://github.com/labrinea reopened
https://github.com/llvm/llvm-project/pull/101712
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/101712
>From 2fe8ef63846989952a1c72b83114aabe6f36637a Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Fri, 2 Aug 2024 17:32:23 +0100
Subject: [PATCH] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V.
https://github.com/labrinea converted_to_draft
https://github.com/llvm/llvm-project/pull/101712
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>From b6abb4f0fcf50d7498a6f0d0ef8b75808c8b1eb1 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 10 Sep 2024 14:02:17 +0100
Subject: [PATCH 1/2] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata.
https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/109299
These extensions depend on each other as follows: mte -> mte2
Currently in LLVM FeatureMTE models both FEAT_MTE and FEAT_MTE2 lumped
together. However the architecture does not mandate that both need to be
im
labrinea wrote:
Adding the GCC folks @andrewcarlotti and @Wilco1 for visibility.
https://github.com/llvm/llvm-project/pull/109299
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labrinea wrote:
> From the patch it is clear all CPUs that implement MTE only support MTE2 -
> and it seems unlikely this will change.
Not quite true. I didn't change those CPU entries to keep the behavior NFC,
which may have been a mistake actually. The reference manual suggests that
Neovers
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/110297
>From 82047dc021979fe58001b15c740649c3d44dd23b Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Fri, 27 Sep 2024 16:37:26 +0100
Subject: [PATCH] [FMV][AArch64] Unify features ssbs and ssbs2.
Accordin
@@ -45,8 +45,6 @@ static void __init_cpu_features_constructor(unsigned long
hwcap,
setCPUFeature(FEAT_SSBS2);
if (hwcap2 & HWCAP2_MTE)
setCPUFeature(FEAT_MEMTAG2);
- if (hwcap2 & HWCAP2_MTE3)
labrinea wrote:
There are no uses of the removed feature
https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/115363
It belongs to the HINT space so it can be executed as NOP if the hardware
doesn't support it.
Reviewed in ACLE -> https://github.com/ARM-software/acle/pull/357
>From 0a0ec7e01e82e5928f16bf7b8524cdaae0756e90 M
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/114387
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labrinea wrote:
> I wonder if we can get any cases of using asm msr in function version for
> features in question? Anyway LGTM to be aligned with specification.
Dit was the only FMV feature with a corresponding PSTATE value which could be
dirrectly used with MRS/MSR-immediate. The rest of the
https://github.com/labrinea closed
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/113281
>From 2b416dd0071d45be3f92671f0cb238091689a9dd Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 21 Oct 2024 17:15:47 +0100
Subject: [PATCH 1/2] [FMV][AArch64] Expand feature dependencies using
A
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/113281
>From 2b416dd0071d45be3f92671f0cb238091689a9dd Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 21 Oct 2024 17:15:47 +0100
Subject: [PATCH 1/3] [FMV][AArch64] Expand feature dependencies using
A
https://github.com/labrinea ready_for_review
https://github.com/llvm/llvm-project/pull/113281
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https://github.com/labrinea edited
https://github.com/llvm/llvm-project/pull/113281
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/115762
>From aff962d795e56f7b41af44860feb77e656091b78 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 11 Nov 2024 20:10:01 +
Subject: [PATCH 1/3] [clang][FMV] Fix crash with cpu_specific attribute.
https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/117988
Fixes regression in sanitizer buildbots caused by #116257.
>From 27de3fb4c80f909cd58ee4d579665fd6d8fdaf8d Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 28 Nov 2024 10:24:42 +
Subject: [PA
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/116257
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>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/6] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/7] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
@@ -2938,36 +2914,17 @@ void CodeGenFunction::EmitRISCVMultiVersionResolver(
bool HasDefault = false;
unsigned DefaultIndex = 0;
- SmallVector CurrOptions(
- Options);
-
- llvm::stable_sort(
- CurrOptions, [](const CodeGenFunction::MultiVersionResolverOption &L
@@ -4303,21 +4288,15 @@ void CodeGenModule::emitMultiVersionFunctions() {
continue;
llvm::Function *Func = createFunction(CurFD, I);
- StringRef Architecture;
Feats.clear();
- if (getTarget().getTriple().is
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/7] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/3] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/4] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
@@ -48,6 +48,19 @@ std::optional
AArch64::ArchInfo::findBySubArch(StringRef SubA
return {};
}
+unsigned AArch64::getFMVPriority(ArrayRef Features) {
+ constexpr unsigned MaxFMVPriority = 1000;
+ unsigned Priority = 0;
+ unsigned NumFeatures = 0;
+ for (StringRef Feature
@@ -1363,19 +1363,28 @@ static llvm::X86::ProcessorFeatures
getFeature(StringRef Name) {
// correct, so it asserts if the value is out of range.
}
-unsigned X86TargetInfo::multiVersionSortPriority(StringRef Name) const {
- // Valid CPUs have a 'key feature' that compares j
@@ -218,8 +218,8 @@ void ABIInfo::appendAttributeMangling(StringRef AttrStr,
// only have "+" prefixes here.
assert(LHS.starts_with("+") && RHS.starts_with("+") &&
"Features should always have a prefix.");
-return TI.multiVersionSortPriority(LHS.substr(1)
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/115762
>From aff962d795e56f7b41af44860feb77e656091b78 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 11 Nov 2024 20:10:01 +
Subject: [PATCH 1/3] [clang][FMV] Fix crash with cpu_specific attribute.
https://github.com/labrinea edited
https://github.com/llvm/llvm-project/pull/115762
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/2] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/115762
>From aff962d795e56f7b41af44860feb77e656091b78 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 11 Nov 2024 20:10:01 +
Subject: [PATCH 1/2] [clang][FMV] Fix crash with cpu_specific attribute.
labrinea wrote:
I believe the latest revision is a better fix.
https://github.com/llvm/llvm-project/pull/115762
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@@ -4216,22 +4216,11 @@ static void
ReplaceUsesOfNonProtoTypeWithRealFunction(llvm::GlobalValue *Old,
llvm::Function *NewFn);
static unsigned
-TargetMVPriority(const TargetInfo &TI,
- const CodeGenFunction:
@@ -4216,22 +4216,11 @@ static void
ReplaceUsesOfNonProtoTypeWithRealFunction(llvm::GlobalValue *Old,
llvm::Function *NewFn);
static unsigned
-TargetMVPriority(const TargetInfo &TI,
- const CodeGenFunction:
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/116257
>From eb6fea771b0824fef979e5eef26718ecbc8c7f56 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Thu, 14 Nov 2024 16:07:32 +
Subject: [PATCH 1/3] [NFC][clang][FMV][TargetInfo] Refactor API for FMV
labrinea wrote:
ping
https://github.com/llvm/llvm-project/pull/116257
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labrinea wrote:
ping
https://github.com/llvm/llvm-project/pull/115762
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https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/108857
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labrinea wrote:
This may sound like a bad idea in terms of future maintenance, but how about we
guarded the enum entries I am removing with
`#if __FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL < __ARM_ACLE_VERSION(2024, 3,
0)` ?
https://github.com/llvm/llvm-project/pull/108024
__
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@@ -114,8 +114,8 @@ void ThreeVersionsSameAttr(void){}
// CHECK: define {{.*}}void @ThreeVersionsSameAttr.Z() #[[K]]
ATTR(cpu_specific(knl))
-void CpuSpecificNoDispatch(void) {}
-// CHECK: define {{.*}}void @CpuSpecificNoDispatch.Z() #[[K:[0-9]+]]
+void CpuSpecificNoDispatch(v
@@ -48,6 +48,19 @@ std::optional
AArch64::ArchInfo::findBySubArch(StringRef SubA
return {};
}
+unsigned AArch64::getFMVPriority(ArrayRef Features) {
+ constexpr unsigned MaxFMVPriority = 1000;
+ unsigned Priority = 0;
+ unsigned NumFeatures = 0;
+ for (StringRef Feature
labrinea wrote:
> Can you better explain what the crash cause is? It isn't clear what the
> change here is doing.
Oh sorry, I thought it became evident with the latest revision. The reason we
are crashing is that we call takeName on the same Value. That is because when
replaceDeclarationWith
@@ -48,6 +48,19 @@ std::optional
AArch64::ArchInfo::findBySubArch(StringRef SubA
return {};
}
+unsigned AArch64::getFMVPriority(ArrayRef Features) {
+ constexpr unsigned MaxFMVPriority = 1000;
+ unsigned Priority = 0;
+ unsigned NumFeatures = 0;
+ for (StringRef Feature
https://github.com/labrinea approved this pull request.
Perhaps the title meant to say "backend"? Looks good, please add a short
description, or correct the title for more clarity. Thanks!
https://github.com/llvm/llvm-project/pull/116244
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https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/116257
Currently we have code with target hooks in CodeGenModule shared between X86
and AArch64 for sorting MultiVersionResolverOptions. Those are used when
generating IFunc resolvers for FMV. The RISCV target has di
@@ -2938,36 +2914,17 @@ void CodeGenFunction::EmitRISCVMultiVersionResolver(
bool HasDefault = false;
unsigned DefaultIndex = 0;
- SmallVector CurrOptions(
- Options);
-
- llvm::stable_sort(
- CurrOptions, [](const CodeGenFunction::MultiVersionResolverOption &L
https://github.com/labrinea edited
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@@ -4303,21 +4288,15 @@ void CodeGenModule::emitMultiVersionFunctions() {
continue;
llvm::Function *Func = createFunction(CurFD, I);
- StringRef Architecture;
Feats.clear();
- if (getTarget().getTriple().is
labrinea wrote:
@BeMg, does the RISC-V code look okay to you?
https://github.com/llvm/llvm-project/pull/116257
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@@ -4303,21 +4288,15 @@ void CodeGenModule::emitMultiVersionFunctions() {
continue;
llvm::Function *Func = createFunction(CurFD, I);
- StringRef Architecture;
Feats.clear();
- if (getTarget().getTriple().is
labrinea wrote:
> A motivating example might be target_version("simd+dotprod") and
> target_version("sve"): when sve is available we should pick that version, but
> the current rule prioritizes the number of attribute-specified features over
> their overall weight.
I agree about this. As I sa
https://github.com/labrinea ready_for_review
https://github.com/llvm/llvm-project/pull/118544
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https://github.com/llvm/llvm-project/pull/118544
>From e028f19f1b4154e44c61e371ae5feeb522085338 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 3 Dec 2024 20:22:37 +
Subject: [PATCH] [FMV][AArch64][clang] Emit fmv-features metadata in LLVM
https://github.com/labrinea converted_to_draft
https://github.com/llvm/llvm-project/pull/118544
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labrinea wrote:
> > Suppose you have target_version("i8mm+dotprod") and target_version("fcma").
> > The first version clearly has higher priority
>
> According to the [current
> rules](https://arm-software.github.io/acle/main/acle.html#selection) yes, but
> IMO that rule is broken and doesn'
https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/119231
i8mm -> simd
fp16fml -> simd
frintts -> fp
bf16 -> simd
sme -> fp16
Approved in ACLE as https://github.com/ARM-software/acle/pull/368
>From f6f2fd6aac09a0f2c14545e1fbda9aec7eb2ed46 Mon Sep 17 00:00:00 2001
Fro
labrinea wrote:
@sdesmalen-arm the dependencies were agreed internally with @paulwalker-arm.
Let us know if you have any reservations.
https://github.com/llvm/llvm-project/pull/119231
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/118544
>From e028f19f1b4154e44c61e371ae5feeb522085338 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 3 Dec 2024 20:22:37 +
Subject: [PATCH 1/2] [FMV][AArch64][clang] Emit fmv-features metadata in
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/121921
>From 785c6eca701edbd42686a4adaa2099b55b5271a0 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 7 Jan 2025 11:37:32 +
Subject: [PATCH 1/2] [FMV][AArch64] Simplify version selection according
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/121921
>From 785c6eca701edbd42686a4adaa2099b55b5271a0 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Tue, 7 Jan 2025 11:37:32 +
Subject: [PATCH 1/2] [FMV][AArch64] Simplify version selection according
@@ -49,16 +49,11 @@ std::optional
AArch64::ArchInfo::findBySubArch(StringRef SubA
}
unsigned AArch64::getFMVPriority(ArrayRef Features) {
labrinea wrote:
Ah I see what you mean, we should first compare the highest priority feature
between the two sets. In t
https://github.com/labrinea closed
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https://github.com/labrinea created
https://github.com/llvm/llvm-project/pull/121921
Currently, the more features a version has, the higher its priority is. We are
changing ACLE https://github.com/ARM-software/acle/pull/370 as follows:
"Among any two versions, the higher priority version is de
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/119231
>From f6f2fd6aac09a0f2c14545e1fbda9aec7eb2ed46 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 9 Dec 2024 13:00:58 +
Subject: [PATCH 1/2] [AArch64][FMV] Add missing feature dependencies and
labrinea wrote:
@sdesmalen-arm thanks for reviewing. I have addressed your comments. Do the
llvm tests look okay?
https://github.com/llvm/llvm-project/pull/119231
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https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/119231
>From f6f2fd6aac09a0f2c14545e1fbda9aec7eb2ed46 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Mon, 9 Dec 2024 13:00:58 +
Subject: [PATCH 1/2] [AArch64][FMV] Add missing feature dependencies and
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/119231
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@@ -349,6 +349,14 @@ void AArch64::ExtensionSet::reconstructFromParsedFeatures(
}
}
+uint64_t AArch64::ExtensionSet::toCpuSupportsMask() const {
labrinea wrote:
Hmm, I am thinking we may want to reuse this once we change
[getFMVPriority](https://github.com
@@ -61,13 +61,13 @@ unsigned AArch64::getFMVPriority(ArrayRef
Features) {
return Priority + MaxFMVPriority * NumFeatures;
}
-uint64_t AArch64::getCpuSupportsMask(ArrayRef FeatureStrs) {
- uint64_t FeaturesMask = 0;
- for (const StringRef &FeatureStr : FeatureStrs) {
-
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