https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/97113
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https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/97762
>From c2913d1074c5bfa771379d68e9ba728a3d1d1ce5 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 1 Jul 2024 17:06:56 +
Subject: [PATCH 1/4] [ValueTracking] use KnownBits to compute fpclass from
bitc
AlexMaclean wrote:
> Can you add some tests to demonstrate that this patch will enable more
> optimizations in some real-world applications?
I can extend the existing test cases to make them more elaborate/real-looking,
but I'm guessing that would not qualify as "real-world". This patch is
mo
https://github.com/AlexMaclean created
https://github.com/llvm/llvm-project/pull/107936
Remove the following intrinsics which correspond directly to a bitcast:
- llvm.nvvm.bitcast.f2i
- llvm.nvvm.bitcast.i2f
- llvm.nvvm.bitcast.d2ll
- llvm.nvvm.bitcast.ll2d
>From ff978f81e0eedbc5e7547acabe414f2
AlexMaclean wrote:
> It may be worth adding a note about this in the release notes.
I'm not familiar with these, can you point me to an analogous change I could
use as an example?
https://github.com/llvm/llvm-project/pull/107936
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https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/94422
>From 708374e03f1bf70006f2472f19edad1bd621e2d6 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 3 Jun 2024 16:46:36 +
Subject: [PATCH] [NVPTX] Revamp NVVMIntrRange pass
---
clang/test/CodeGenCUDA/
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/94422
>From 708374e03f1bf70006f2472f19edad1bd621e2d6 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 3 Jun 2024 16:46:36 +
Subject: [PATCH 1/2] [NVPTX] Revamp NVVMIntrRange pass
---
clang/test/CodeGenC
@@ -1,50 +1,51 @@
-//===- NVVMIntrRange.cpp - Set !range metadata for NVVM intrinsics
===//
+//===- NVVMIntrRange.cpp - Set range attributes for NVVM intrinsics
---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
// See ht
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/94422
>From 708374e03f1bf70006f2472f19edad1bd621e2d6 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 3 Jun 2024 16:46:36 +
Subject: [PATCH 1/3] [NVPTX] Revamp NVVMIntrRange pass
---
clang/test/CodeGenC
@@ -128,6 +128,15 @@ bool findOneNVVMAnnotation(const GlobalValue *gv, const
std::string &prop,
return true;
}
+static std::optional
+findOneNVVMAnnotation(const GlobalValue &GV, const std::string &PropName) {
+ unsigned RetVal;
+ bool Found = findOneNVVMAnnotation(&GV, P
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-attributes --version 5
+; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -mcpu=sm_20
-passes=nvvm-intr-range | FileCheck %s
+
+define i32 @test_maxntid() {
+; CHECK-LABEL:
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/94422
>From 708374e03f1bf70006f2472f19edad1bd621e2d6 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 3 Jun 2024 16:46:36 +
Subject: [PATCH 1/4] [NVPTX] Revamp NVVMIntrRange pass
---
clang/test/CodeGenC
@@ -139,24 +138,23 @@ define ptx_device i32 @test_ctaid_w() {
define ptx_device i32 @test_nctaid_y() {
; CHECK: mov.u32 %r{{[0-9]+}}, %nctaid.y;
-; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y(), !range
![[GRID_SIZE_YZ:[0-9]+]]
+; RANGE: call range(i32 1, 65536) i32 @llv
https://github.com/AlexMaclean created
https://github.com/llvm/llvm-project/pull/94639
None
>From 227c36f7261854a1b6f8fb12fd902ffa7380be0d Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Thu, 6 Jun 2024 16:36:19 +
Subject: [PATCH] fixup cuda-builtin-vars.cu broken in IntrRange change
--
@@ -6,21 +6,21 @@
__attribute__((global))
void kernel(int *out) {
int i = 0;
- out[i++] = threadIdx.x; // CHECK: call noundef i32
@llvm.nvvm.read.ptx.sreg.tid.x()
- out[i++] = threadIdx.y; // CHECK: call noundef i32
@llvm.nvvm.read.ptx.sreg.tid.y()
- out[i++] = threadIdx
https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/94639
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@@ -1549,30 +1549,10 @@ define amdgpu_kernel void
@multiple_uses_fneg_select_f64(double %x, double %y, i
define amdgpu_kernel void @fnge_select_f32_multi_use_regression(float %.i2369)
{
; GCN-LABEL: fnge_select_f32_multi_use_regression:
; GCN: ; %bb.0: ; %.entry
-; GCN-
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/97762
>From ce146e18f74e8e984ef83d152f3a5fe88e56f287 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 1 Jul 2024 17:06:56 +
Subject: [PATCH 1/6] [ValueTracking] use KnownBits to compute fpclass from
bitc
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/97762
>From ddb38bd6c86e36ab8b46a4fb5f97390d140f4aa1 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 1 Jul 2024 17:06:56 +
Subject: [PATCH 1/6] [ValueTracking] use KnownBits to compute fpclass from
bitc
AlexMaclean wrote:
@arsenm, @goldsteinn when you have a minute could you take another look at
this? I think I've addressed all the issues you've raised.
https://github.com/llvm/llvm-project/pull/97762
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@@ -5921,6 +5921,61 @@ void computeKnownFPClass(const Value *V, const APInt
&DemandedElts,
break;
}
+ case Instruction::BitCast: {
+const Value *Src;
+if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) ||
+!Src->getType()->isIntOrIntVectorTy())
+ b
@@ -5921,6 +5921,61 @@ void computeKnownFPClass(const Value *V, const APInt
&DemandedElts,
break;
}
+ case Instruction::BitCast: {
+const Value *Src;
+if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) ||
+!Src->getType()->isIntOrIntVectorTy())
+ b
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/97762
>From 0477447f29b2889f92abf44cacd5e0f2c4e7f387 Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 1 Jul 2024 17:06:56 +
Subject: [PATCH 1/6] [ValueTracking] use KnownBits to compute fpclass from
bitc
https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/97762
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>From 2dc91ada9078e5c7344e74d5b549e896056f89ad Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Mon, 1 Jul 2024 17:06:56 +
Subject: [PATCH 1/5] [ValueTracking] use KnownBits to compute fpclass from
bitc
@@ -5805,6 +5805,37 @@ void computeKnownFPClass(const Value *V, const APInt
&DemandedElts,
break;
}
+ case Instruction::BitCast: {
+const Value *Src;
+if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) ||
+!Src->getType()->isIntOrIntVectorTy())
+ b
@@ -2690,6 +2690,163 @@ entry:
ret double %abs
}
+define float @bitcast_to_float_sign_0(i32 %arg) {
+; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind
willreturn memory(none)
+; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float
@bitcast_to_flo
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/107936
>From ff978f81e0eedbc5e7547acabe414f2f1b0fd31a Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Fri, 6 Sep 2024 18:35:20 +
Subject: [PATCH 1/2] [NVPTX] Remove nvvm.bitcast.* intrinsics
---
clang/inclu
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/107936
>From ff978f81e0eedbc5e7547acabe414f2f1b0fd31a Mon Sep 17 00:00:00 2001
From: Alex MacLean
Date: Fri, 6 Sep 2024 18:35:20 +
Subject: [PATCH 1/2] [NVPTX] Remove nvvm.bitcast.* intrinsics
---
clang/inclu
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/112834
>From 0b43fa7364bf45515905d98cd0731c5509de5196 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Thu, 17 Oct 2024 16:49:24 +
Subject: [PATCH 1/2] [NVPTX] Remove nvvm.ldg.global.* intrinsics
---
clang/l
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/112834
>From 3c21269ad0b7be617b06cde5debe405f99ef17ef Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Thu, 17 Oct 2024 16:49:24 +
Subject: [PATCH 1/2] [NVPTX] Remove nvvm.ldg.global.* intrinsics
---
clang/l
https://github.com/AlexMaclean created
https://github.com/llvm/llvm-project/pull/112834
Remove these intrinsics which can be better represented by load instructions
with `!invariant.load` metadata:
- llvm.nvvm.ldg.global.i
- llvm.nvvm.ldg.global.f
- llvm.nvvm.ldg.global.p
>From 0b43fa7364bf45
https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/112834
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@@ -599,14 +599,6 @@ TARGET_BUILTIN(__nvvm_e4m3x2_to_f16x2_rn_relu, "V2hs", "",
AND(SM_89,PTX81))
TARGET_BUILTIN(__nvvm_e5m2x2_to_f16x2_rn, "V2hs", "", AND(SM_89,PTX81))
TARGET_BUILTIN(__nvvm_e5m2x2_to_f16x2_rn_relu, "V2hs", "", AND(SM_89,PTX81))
-// Bitcast
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@@ -599,14 +599,6 @@ TARGET_BUILTIN(__nvvm_e4m3x2_to_f16x2_rn_relu, "V2hs", "",
AND(SM_89,PTX81))
TARGET_BUILTIN(__nvvm_e5m2x2_to_f16x2_rn, "V2hs", "", AND(SM_89,PTX81))
TARGET_BUILTIN(__nvvm_e5m2x2_to_f16x2_rn_relu, "V2hs", "", AND(SM_89,PTX81))
-// Bitcast
AlexMaclean wrote:
@Artem-B ping for review
https://github.com/llvm/llvm-project/pull/120806
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@@ -10,8 +10,14 @@
// CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[RET_ADDR]], align 8
// CHECK-NEXT:store i32 1, ptr [[TMP0]], align 4
// CHECK-NEXT:ret void
+//
__attribute__((nvptx_kernel)) void foo(int *ret) {
*ret = 1;
}
-// CHECK: !0 = !{ptr @foo, !"kernel
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https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/125908
>From 12bdf8bfa72b10d1e8ccc305cd57c337f2799e52 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Wed, 5 Feb 2025 18:46:03 +
Subject: [PATCH 1/2] [NVPTX] Convert scalar function nvvm.annotations to
attri
@@ -179,6 +179,13 @@ static bool argHasNVVMAnnotation(const Value &Val,
return false;
}
+static std::optional getFnAttrParsedIntOrNull(const Function &F,
+StringRef Attr) {
+ if (F.hasFnAttribute(Attr))
+return F.g
@@ -179,6 +179,13 @@ static bool argHasNVVMAnnotation(const Value &Val,
return false;
}
+static std::optional getFnAttrParsedIntOrNull(const Function &F,
AlexMaclean wrote:
Removed
https://github.com/llvm/llvm-project/pull/125908
__
https://github.com/AlexMaclean created
https://github.com/llvm/llvm-project/pull/125908
Replace some more nvvm.annotations with function attributes, auto-upgrading the
annotations as needed. These new attributes will be more idiomatic and
compile-time efficient than the annotations.
- !"maxc
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/125908
>From d66d8adac5cf32f7f9f5878799c0167d39f41df7 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Wed, 5 Feb 2025 18:46:03 +
Subject: [PATCH] [NVPTX] Convert scalar function nvvm.annotations to
attribute
@@ -179,6 +179,13 @@ static bool argHasNVVMAnnotation(const Value &Val,
return false;
}
+static std::optional getFnAttrParsedInt(const Function &F,
+ StringRef Attr) {
+ return F.hasFnAttribute(Attr)
+ ? std::opti
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/125908
>From cb6ac07e72cc1361343470842793cf9bc4995a19 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Wed, 5 Feb 2025 18:46:03 +
Subject: [PATCH 1/2] [NVPTX] Convert scalar function nvvm.annotations to
attri
https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/125908
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@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
@@ -324,14 +326,15 @@ MaybeAlign getAlign(const Function &F, unsigned Index) {
F.getAttributes().getAttributes(Index).getStackAlignment())
return StackAlign;
- // If that is missing, check the legacy nvvm metadata
- std::vector Vs;
- bool retval = findAllNVVMA
@@ -5022,6 +5022,69 @@ bool llvm::UpgradeDebugInfo(Module &M) {
return Modified;
}
+bool static upgradeSingleNVVMAnnotation(GlobalValue *GV, StringRef K,
+const Metadata *V) {
+ if (K == "kernel") {
+assert(mdconst::extract(V)->ge
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/119261
>From f9f30a77f5e7232f968a3063c34338c9dfc7bac5 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Fri, 8 Nov 2024 22:39:34 +
Subject: [PATCH 1/3] [NVPTX] Add NVVMUpgradeAnnotations pass to cleanup legacy
@@ -302,6 +299,19 @@ void NVPTXTargetCodeGenInfo::addNVVMMetadata(
llvm::ConstantAsMetadata::get(GV), llvm::MDString::get(Ctx, Name),
llvm::ConstantAsMetadata::get(
llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), Operand))};
+ // Append metadata to nv
@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
@@ -5022,6 +5022,69 @@ bool llvm::UpgradeDebugInfo(Module &M) {
return Modified;
}
+bool static upgradeSingleNVVMAnnotation(GlobalValue *GV, StringRef K,
+const Metadata *V) {
+ if (K == "kernel") {
+assert(mdconst::extract(V)->ge
https://github.com/AlexMaclean edited
https://github.com/llvm/llvm-project/pull/119261
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@@ -10,7 +10,7 @@
extern "C"
__device__ void device_function() {}
-// CHECK-LABEL: define{{.*}} void @global_function
+// CHECK: define{{.*}} void @global_function{{.*}} #[[ATTR0:[0-9]+]]
AlexMaclean wrote:
Fixed
https://github.com/llvm/llvm-project/pull/119
@@ -5022,6 +5022,69 @@ bool llvm::UpgradeDebugInfo(Module &M) {
return Modified;
}
+bool static upgradeSingleNVVMAnnotation(GlobalValue *GV, StringRef K,
+const Metadata *V) {
+ if (K == "kernel") {
+assert(mdconst::extract(V)->ge
@@ -5022,6 +5022,69 @@ bool llvm::UpgradeDebugInfo(Module &M) {
return Modified;
}
+bool static upgradeSingleNVVMAnnotation(GlobalValue *GV, StringRef K,
+const Metadata *V) {
+ if (K == "kernel") {
+assert(mdconst::extract(V)->ge
@@ -5911,31 +5911,21 @@ bool llvm::omp::isOpenMPKernel(Function &Fn) {
KernelSet llvm::omp::getDeviceKernels(Module &M) {
// TODO: Create a more cross-platform way of determining device kernels.
- NamedMDNode *MD = M.getNamedMetadata("nvvm.annotations");
KernelSet Kernel
@@ -324,14 +326,17 @@ MaybeAlign getAlign(const Function &F, unsigned Index) {
F.getAttributes().getAttributes(Index).getStackAlignment())
return StackAlign;
- // If that is missing, check the legacy nvvm metadata
- std::vector Vs;
- bool retval = findAllNVVMA
@@ -5022,6 +5022,69 @@ bool llvm::UpgradeDebugInfo(Module &M) {
return Modified;
}
+bool static upgradeSingleNVVMAnnotation(GlobalValue *GV, StringRef K,
+const Metadata *V) {
+ if (K == "kernel") {
+assert(mdconst::extract(V)->ge
https://github.com/AlexMaclean edited
https://github.com/llvm/llvm-project/pull/119261
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@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
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https://github.com/llvm/llvm-project/pull/120806
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@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
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@@ -556,19 +556,16 @@ llvm.func @kernel_func() attributes {nvvm.kernel} {
llvm.return
}
-// CHECK: !nvvm.annotations =
-// CHECK-NOT: {ptr @nvvm_special_regs, !"kernel", i32 1}
-// CHECK: {ptr @kernel_func, !"kernel", i32 1}
+// CHECK: ptx_kernel void @kernel_func
--
AlexMaclean wrote:
> In MLIR, we also have other NVVM metadata such as `reqntid` and `maxntid`,
> among others. What is the plan for these? Will they remain as metadata, or
> will they be expressed differently?
Eventually, I hope to migrate all !nvvm.annotations, including `reqntid` and
`maxn
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AlexMaclean wrote:
@jdoerfert / @arsenm ping for review when you have a moment
https://github.com/llvm/llvm-project/pull/122320
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@@ -227,14 +228,14 @@ class NVVMDialectLLVMIRTranslationInterface
} else if (attribute.getName() ==
AlexMaclean wrote:
Yes, I plan to replace all !nvvm.annotations with attributes. This change is
already fairly large and I would prefer to avoid a single mon
https://github.com/AlexMaclean approved this pull request.
LGTM, please wait for @Artem-B's approval before landing.
https://github.com/llvm/llvm-project/pull/134416
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@@ -1548,6 +1548,45 @@ let TargetPrefix = "nvvm" in {
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoMem, IntrNoCallback]>;
def int_nvvm_e5m2x2_to_f16x2_rn_relu :
ClangBuiltin<"__nvvm_e5m2x2_to_f16x2_rn_relu">,
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoM
@@ -1548,6 +1548,45 @@ let TargetPrefix = "nvvm" in {
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoMem, IntrNoCallback]>;
def int_nvvm_e5m2x2_to_f16x2_rn_relu :
ClangBuiltin<"__nvvm_e5m2x2_to_f16x2_rn_relu">,
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoM
@@ -1944,6 +1944,62 @@ def : Pat<(int_nvvm_e5m2x2_to_f16x2_rn Int16Regs:$a),
def : Pat<(int_nvvm_e5m2x2_to_f16x2_rn_relu Int16Regs:$a),
(CVT_f16x2_e5m2x2 $a, CvtRN_RELU)>;
+def : Pat<(int_nvvm_ff_to_e2m3x2_rn f32:$a, f32:$b),
+ (CVT_e2m3x2_f32 $a, $b, CvtRN)
@@ -703,6 +703,53 @@ let hasSideEffects = false in {
defm CVT_to_tf32_rz_satf : CVT_TO_TF32<"rz.satfinite", [hasPTX<86>,
hasSM<100>]>;
defm CVT_to_tf32_rn_relu_satf : CVT_TO_TF32<"rn.relu.satfinite",
[hasPTX<86>, hasSM<100>]>;
defm CVT_to_tf32_rz_relu_satf : CVT_TO_TF
https://github.com/AlexMaclean updated
https://github.com/llvm/llvm-project/pull/134111
>From 46de785e801bf8ca87e01aee9ad0a13ac07a47d6 Mon Sep 17 00:00:00 2001
From: Alex Maclean
Date: Tue, 1 Apr 2025 20:22:24 +
Subject: [PATCH] [NVPTX] Auto-Upgrade llvm.nvvm.atomic.load.{inc,dec}.32
---
@@ -2314,6 +2317,12 @@ static Value *upgradeNVVMIntrinsicCall(StringRef Name,
CallBase *CI,
Value *Val = CI->getArgOperand(1);
Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, MaybeAlign(),
AtomicOrdering::SequentiallyConsi
AlexMaclean wrote:
It seems like we already have perhaps too many mechanisms to control how sqrt
gets lowered. There is the `__nv_sqrtf` libdevice function which chooses
between specific (1:1 to PTX) intrinsics based on NVVMReflect and then there is
also `llvm.sqrt` and `nvvm.sqrt.f` which are
https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/135644
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https://github.com/AlexMaclean edited
https://github.com/llvm/llvm-project/pull/135444
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@@ -0,0 +1,48 @@
+; RUN: llc -O0 < %s -mtriple=nvptx64 -mcpu=sm_80 | FileCheck %s
-check-prefixes=ALL,NOPTRCONV,CLS64
AlexMaclean wrote:
Use update_llc_test_checks for this test.
https://github.com/llvm/llvm-project/pull/135444
_
@@ -2381,29 +2387,41 @@ def INT_PTX_LDG_G_v4i32_ELE : VLDG_G_ELE_V4<"u32",
Int32Regs>;
def INT_PTX_LDG_G_v4f32_ELE : VLDG_G_ELE_V4<"f32", Float32Regs>;
-multiclass NG_TO_G {
+multiclass NG_TO_G Preds = []> {
def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$sr
@@ -3019,8 +3019,42 @@ SDValue NVPTXTargetLowering::LowerADDRSPACECAST(SDValue
Op,
unsigned SrcAS = N->getSrcAddressSpace();
unsigned DestAS = N->getDestAddressSpace();
if (SrcAS != llvm::ADDRESS_SPACE_GENERIC &&
- DestAS != llvm::ADDRESS_SPACE_GENERIC)
+ DestA
https://github.com/AlexMaclean commented:
Getting close to ready, a couple more places to update:
- NVPTXTargetTransformInfo.cpp: evaluateIsSpace
- NVPTXUsage.rst: Address Space section, add intrinsics you're modifying, such
as `mapa`, to the spec
https://github.com/llvm/llvm-project/pull/13544
@@ -0,0 +1,329 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc < %s -o - -mcpu=sm_90 -mattr=+ptx78 | FileCheck %s
+; RUN: %if ptxas-12.0 %{ llc < %s -mcpu=sm_90 -mattr=+ptx78| %ptxas-verify
-arch=sm_90 %}
+
+tar
https://github.com/AlexMaclean approved this pull request.
https://github.com/llvm/llvm-project/pull/135444
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https://github.com/AlexMaclean commented:
llvm changes LGTM, though I'm not too familiar with the MLIR portion of this
change.
https://github.com/llvm/llvm-project/pull/135444
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@@ -703,6 +703,46 @@ let hasSideEffects = false in {
defm CVT_to_tf32_rz_satf : CVT_TO_TF32<"rz.satfinite", [hasPTX<86>,
hasSM<100>]>;
defm CVT_to_tf32_rn_relu_satf : CVT_TO_TF32<"rn.relu.satfinite",
[hasPTX<86>, hasSM<100>]>;
defm CVT_to_tf32_rz_relu_satf : CVT_TO_TF
https://github.com/AlexMaclean edited
https://github.com/llvm/llvm-project/pull/134345
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AlexMaclean wrote:
Merging on behalf of @YonahGoldberg at his request offline.
https://github.com/llvm/llvm-project/pull/134416
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https://github.com/AlexMaclean closed
https://github.com/llvm/llvm-project/pull/134416
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@@ -1548,6 +1548,45 @@ let TargetPrefix = "nvvm" in {
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoMem, IntrNoCallback]>;
def int_nvvm_e5m2x2_to_f16x2_rn_relu :
ClangBuiltin<"__nvvm_e5m2x2_to_f16x2_rn_relu">,
Intrinsic<[llvm_v2f16_ty], [llvm_i16_ty], [IntrNoM
@@ -982,8 +982,9 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
case ADDRESS_SPACE_SHARED:
Opc = TM.is64Bit() ? NVPTX::cvta_shared_64 : NVPTX::cvta_shared;
break;
-case ADDRESS_SPACE_DSHARED:
- Opc = TM.is64Bit() ? NVPTX::cvta_dshared_64 :
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