https://github.com/akshayrdeodhar approved this pull request.
https://github.com/llvm/llvm-project/pull/114589
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@@ -1,8 +1,17 @@ bool Sema::CheckFunctionDeclaration(Scope *S,
FunctionDecl *NewFD,
<< NewFD;
}
-if (!Redeclaration && LangOpts.CUDA)
+if (!Redeclaration && LangOpts.CUDA) {
akshayrdeodhar wrote:
This makes sense. Perhaps a wa
akshayrdeodhar wrote:
The LLVM-facing parts of this lgtm
https://github.com/llvm/llvm-project/pull/114589
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@@ -1,8 +1,17 @@ bool Sema::CheckFunctionDeclaration(Scope *S,
FunctionDecl *NewFD,
<< NewFD;
}
-if (!Redeclaration && LangOpts.CUDA)
+if (!Redeclaration && LangOpts.CUDA) {
akshayrdeodhar wrote:
Is it possible to add a check
@@ -1,8 +1,17 @@ bool Sema::CheckFunctionDeclaration(Scope *S,
FunctionDecl *NewFD,
<< NewFD;
}
-if (!Redeclaration && LangOpts.CUDA)
+if (!Redeclaration && LangOpts.CUDA) {
akshayrdeodhar wrote:
Makes sense. I also realized t
@@ -2070,8 +2070,8 @@ defm INT_PTX_ATOMIC_UMIN_32 : F_ATOMIC_2_AS]>;
// atom_inc atom_dec
akshayrdeodhar wrote:
We don't have a PTX test to prove that the final lowering to PTX will be the
same, but this looks good enough.
https://github.com/llvm/llvm-proje
https://github.com/akshayrdeodhar approved this pull request.
LGTM! Comments are just questions.
https://github.com/llvm/llvm-project/pull/134111
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https://github.com/akshayrdeodhar edited
https://github.com/llvm/llvm-project/pull/134111
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@@ -2314,6 +2317,12 @@ static Value *upgradeNVVMIntrinsicCall(StringRef Name,
CallBase *CI,
Value *Val = CI->getArgOperand(1);
Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, MaybeAlign(),
AtomicOrdering::SequentiallyConsi
@@ -2314,6 +2317,12 @@ static Value *upgradeNVVMIntrinsicCall(StringRef Name,
CallBase *CI,
Value *Val = CI->getArgOperand(1);
Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, MaybeAlign(),
AtomicOrdering::SequentiallyConsi
akshayrdeodhar wrote:
For reference:
https://docs.nvidia.com/cuda/nvvm-ir-spec/index.html#nvvm-specific-intrinsic-functions
https://github.com/llvm/llvm-project/pull/134111
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