[PATCH] D111434: [PowerPC] PPC backend optimization on conditional trap intrustions

NeHuang created this revision. NeHuang added reviewers: nemanjai, stefanp, PowerPC. NeHuang added projects: LLVM, PowerPC. Herald added subscribers: shchenz, JDevlieghere, kbarton, hiraditya. NeHuang requested review of this revision. This patch adds PPC back end optimization to analyze the argume

[PATCH] D111434: [PowerPC] PPC backend optimization on conditional trap intrustions

NeHuang updated this revision to Diff 378284. NeHuang added a comment. clang-format Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111434/new/ https://reviews.llvm.org/D111434 Files: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp llvm/test/CodeGen/P

[PATCH] D110935: [NFC] Update vec_extract builtin signatures to take signed int.

NeHuang accepted this revision as: NeHuang. NeHuang added a comment. This revision is now accepted and ready to land. LTGM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110935/new/ https://reviews.llvm.org/D110935 _

[PATCH] D111229: [PowerPC][Builtin] Allowing __rlwnm to accept a variable as a shift parameter

NeHuang added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-error.c:46 unsigned int mask; - unsigned int res = __builtin_ppc_rlwnm(ui, shift, 7); // expected-error {{argument to '__builtin_ppc_rlwnm' must be a constant integer}} + unsigned int res =

[PATCH] D111229: [PowerPC][Builtin] Allowing __rlwnm to accept a variable as a shift parameter

NeHuang added a comment. Please check and add a test in `clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c` with `shift` as a variable. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111229/new/ https://reviews.llvm.org/D111229 __

[PATCH] D111229: [PowerPC][Builtin] Allowing __rlwnm to accept a variable as a shift parameter

NeHuang accepted this revision as: NeHuang. NeHuang added a comment. This revision is now accepted and ready to land. Thanks. LGTM. One minor can be addressed when commit it. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c:71 + + /*shift = 31, mask = 0x1FF = 511*

[PATCH] D111434: [PowerPC] PPC backend optimization on conditional trap intrustions

NeHuang added a comment. gentle ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111434/new/ https://reviews.llvm.org/D111434 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D112285: [PowerPC] PPC backend optimization to lower int_ppc_tdw/int_ppc_tw intrinsics to TDI/TWI machine instructions

NeHuang created this revision. NeHuang added reviewers: nemanjai, stefanp, PowerPC. NeHuang added a project: LLVM. Herald added subscribers: shchenz, kbarton, hiraditya. NeHuang requested review of this revision. This patch adds the backend optimization to match XL behavior for the two builtins `

[PATCH] D111434: [PowerPC] PPC backend optimization on conditional trap intrustions

NeHuang added a comment. gentle ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111434/new/ https://reviews.llvm.org/D111434 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D108702: [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last

NeHuang created this revision. NeHuang added reviewers: amyk, lei, stefanp, PowerPC. NeHuang added a project: LLVM. Herald added subscribers: shchenz, kbarton, nemanjai. NeHuang requested review of this revision. Herald added a project: clang. This patch renames the vector clear left/right builtin

[PATCH] D108823: [PowerPC] Mark splat immediate instructions as rematerializable

NeHuang created this revision. NeHuang added reviewers: nemanjai, stefanp, lei, PowerPC. NeHuang added a project: LLVM. Herald added subscribers: shchenz, kbarton, hiraditya, qcolombet. NeHuang requested review of this revision. This patch marks splat immediate instructions `XXSPLTIDP` and `XXSPLT

[PATCH] D108702: [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG2e5c17d19e37: [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and… (authored by NeHuang). Repository: rG LLVM Github Monore

[PATCH] D108302: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields.

NeHuang updated this revision to Diff 369531. NeHuang added a comment. Address review comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108302/new/ https://reviews.llvm.org/D108302 Files: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/test

[PATCH] D108302: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields.

NeHuang updated this revision to Diff 370428. NeHuang added a comment. Address review comments - typo update - use proper mcpu in the test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108302/new/ https://reviews.llvm.org/D108302 Files: l

[PATCH] D109178: [PowerPC] Disable vector types when not supported by subtarget features

NeHuang added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-int128.c:4 +// RUN: -triple powerpc64-unknown-unknown -target-cpu pwr8 \ +// RUN: -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | FileCheck %s +// RUN: %clang_cc1 -target-feature +altivec -target-feature +

[PATCH] D108302: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4a226529e2cf: [PowerPC] Fixed the crash due to early if conversion with fixed CR fields (authored by NeHuang). Repository: rG LLVM Github Monorepo

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