@@ -6987,6 +7024,17 @@ class BoUpSLP::ShuffleCostEstimator : public
BaseShuffleAnalysis {
auto *VecTy = FixedVectorType::get(VL.front()->getType(), VL.size());
InstructionCost GatherCost = 0;
SmallVector Gathers(VL.begin(), VL.end());
+auto ComputeGatherCost =
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/80269
>From f4dabdfaa66744ecfca4c0a57472a357db9715d9 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 31 Jan 2024 14:02:38 +
Subject: [PATCH] [VPlan] Update VPInst::onlyFirstLaneUsed to check users.
A VPInstruc
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/80269
>From f4dabdfaa66744ecfca4c0a57472a357db9715d9 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 31 Jan 2024 14:02:38 +
Subject: [PATCH] [VPlan] Update VPInst::onlyFirstLaneUsed to check users.
A VPInstruc
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/80269
>From f4dabdfaa66744ecfca4c0a57472a357db9715d9 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 31 Jan 2024 14:02:38 +
Subject: [PATCH 1/2] [VPlan] Update VPInst::onlyFirstLaneUsed to check users.
A VPIns
@@ -1256,23 +1256,7 @@ class VPInstruction : public VPRecipeWithIRFlags {
}
}
fhahn wrote:
Added back, thanks!
https://github.com/llvm/llvm-project/pull/80269
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@@ -515,6 +515,24 @@ void VPInstruction::execute(VPTransformState &State) {
State.set(this, GeneratedValue, Part);
}
}
+bool VPInstruction::onlyFirstLaneUsed(const VPValue *Op) const {
+ assert(is_contained(operands(), Op) && "Op must be an operand of the
recipe");
+ i
@@ -1397,9 +1397,9 @@ void VPSlotTracker::assignSlots(const VPBasicBlock *VPBB)
{
assignSlot(Def);
}
-bool vputils::onlyFirstLaneUsed(VPValue *Def) {
+bool vputils::onlyFirstLaneUsed(const VPValue *Def) {
return all_of(Def->users(),
-[Def](VPUser *U)
@@ -1397,9 +1397,9 @@ void VPSlotTracker::assignSlots(const VPBasicBlock *VPBB)
{
assignSlot(Def);
}
-bool vputils::onlyFirstLaneUsed(VPValue *Def) {
+bool vputils::onlyFirstLaneUsed(const VPValue *Def) {
return all_of(Def->users(),
-[Def](VPUser *U)
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/80269
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fhahn wrote:
> The only observable changes to existing tests involve cse'ing IV steps from
> replicate regions when unrolling w/o vectorizing, iinm. Is there some other
> scenario worth testing?
I wasn't able to come up with a different test with vectorizing.
https://github.com/llvm/llvm-proj
https://github.com/fhahn closed https://github.com/llvm/llvm-project/pull/80269
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https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/80271
>From f4dabdfaa66744ecfca4c0a57472a357db9715d9 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 31 Jan 2024 14:02:38 +
Subject: [PATCH 1/2] [VPlan] Update VPInst::onlyFirstLaneUsed to check users.
A VPIns
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/80271
>From f4dabdfaa66744ecfca4c0a57472a357db9715d9 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 31 Jan 2024 14:02:38 +
Subject: [PATCH 1/3] [VPlan] Update VPInst::onlyFirstLaneUsed to check users.
A VPIns
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78304
>From 9846f970b6b394ccc3af25b92f238377a8ae7807 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 18:06:36 +
Subject: [PATCH 1/2] [LV] Improve AnyOf reduction codegen.
Update AnyOf reduction cod
@@ -7486,7 +7486,8 @@ static void createAndCollectMergePhiForReduction(
auto *PhiR = cast(RedResult->getOperand(0));
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
- TrackingVH ReductionStartValue = RdxDesc.getRecurrenceStartValue();
+ TrackingVH
@@ -9110,6 +9111,41 @@ void
LoopVectorizationPlanner::adjustRecipesForReductions(
continue;
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
+// Adjust AnyOf reductions; replace the reduction phi for the selected
value
+// with a boole
@@ -453,16 +453,17 @@ Value
*VPInstruction::generateInstruction(VPTransformState &State,
else if (RecurrenceDescriptor::isAnyOfRecurrenceKind(RK)) {
TrackingVH ReductionStartValue =
RdxDesc.getRecurrenceStartValue();
- ReducedPartRdx =
@@ -452,16 +452,17 @@ Value
*VPInstruction::generateInstruction(VPTransformState &State,
else if (RecurrenceDescriptor::isAnyOfRecurrenceKind(RK)) {
TrackingVH ReductionStartValue =
RdxDesc.getRecurrenceStartValue();
fhahn wrote
@@ -9110,6 +9111,41 @@ void
LoopVectorizationPlanner::adjustRecipesForReductions(
continue;
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
+// Adjust AnyOf reductions; replace the reduction phi for the selected
value
+// with a boole
@@ -1079,16 +1070,13 @@ Value *llvm::createAnyOfTargetReduction(IRBuilderBase
&Builder, Value *Src,
NewVal = SI->getTrueValue();
}
- // Create a splat vector with the new value and compare this to the vector
- // we want to reduce.
- ElementCount EC = cast(Src->getTy
@@ -9110,6 +9111,41 @@ void
LoopVectorizationPlanner::adjustRecipesForReductions(
continue;
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
+// Adjust AnyOf reductions; replace the reduction phi for the selected
value
+// with a boole
@@ -9142,7 +9178,9 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
// then extend the loop exit value to enable InstCombine to evaluate the
// entire expression in the smaller type.
Type *PhiTy = PhiR->getStartValue()->getLiveInIRValue()->getType();
-
@@ -9110,6 +9111,41 @@ void
LoopVectorizationPlanner::adjustRecipesForReductions(
continue;
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
+// Adjust AnyOf reductions; replace the reduction phi for the selected
value
fha
@@ -453,16 +453,17 @@ Value
*VPInstruction::generateInstruction(VPTransformState &State,
else if (RecurrenceDescriptor::isAnyOfRecurrenceKind(RK)) {
TrackingVH ReductionStartValue =
RdxDesc.getRecurrenceStartValue();
- ReducedPartRdx =
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/72647
>From 3dfe86782806f048b130d46afa6293712919f672 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Fri, 14 Apr 2023 14:33:57 +0100
Subject: [PATCH 1/2] [Matrix] Convert column-vector ops feeding dot product to
row-ve
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/72647
>From 3dfe86782806f048b130d46afa6293712919f672 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Fri, 14 Apr 2023 14:33:57 +0100
Subject: [PATCH 1/2] [Matrix] Convert column-vector ops feeding dot product to
row-ve
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, Selection
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, Selection
@@ -281,23 +279,19 @@ entry:
define void @store_trunc_add_from_64bits(ptr %src, ptr %dst) {
; CHECK-LABEL: store_trunc_add_from_64bits:
; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT:sub sp, sp, #16
-; CHECK-NEXT:.cfi_def_cfa_offset 16
; CHECK-NEXT:ldr s0, [x0]
;
@@ -281,23 +279,19 @@ entry:
define void @store_trunc_add_from_64bits(ptr %src, ptr %dst) {
; CHECK-LABEL: store_trunc_add_from_64bits:
; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT:sub sp, sp, #16
-; CHECK-NEXT:.cfi_def_cfa_offset 16
; CHECK-NEXT:ldr s0, [x0]
;
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78637
>From efd07e93aed51049ad3783c701284617ae446330 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 17 Jan 2024 11:11:59 +
Subject: [PATCH 1/5] [AArch64] Combine store (trunc X to <3 x i8>) to sequence
of ST1
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78637
>From efd07e93aed51049ad3783c701284617ae446330 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 17 Jan 2024 11:11:59 +
Subject: [PATCH 1/6] [AArch64] Combine store (trunc X to <3 x i8>) to sequence
of ST1
@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, Selection
fhahn wrote:
Updated, comments should be addressed and also updated to use
`MachineFunction::getMachineMemOperand`
https://github.com/llvm/llvm-project/pull/78637
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https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78632
>From a786cdedc2c9a9898cd0b80d84f5b11aace5da1c Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Tue, 28 Nov 2023 15:44:02 +
Subject: [PATCH 1/4] [AArch64] Add custom lowering for load <3 x i8>.
Add custom comb
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78632
>From a786cdedc2c9a9898cd0b80d84f5b11aace5da1c Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Tue, 28 Nov 2023 15:44:02 +
Subject: [PATCH 1/5] [AArch64] Add custom lowering for load <3 x i8>.
Add custom comb
@@ -21248,6 +21248,51 @@ static SDValue foldTruncStoreOfExt(SelectionDAG &DAG,
SDNode *N) {
return SDValue();
}
+// A custom combine to lower load <3 x i8> as the more efficient sequence
+// below:
+//ldrb wX, [x0, #2]
+//ldrh wY, [x0]
+//orr wX, wY, wX, lsl #16
@@ -281,23 +279,19 @@ entry:
define void @store_trunc_add_from_64bits(ptr %src, ptr %dst) {
; CHECK-LABEL: store_trunc_add_from_64bits:
; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT:sub sp, sp, #16
-; CHECK-NEXT:.cfi_def_cfa_offset 16
; CHECK-NEXT:ldr s0, [x0]
;
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/5] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/78113
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https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/6] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
@@ -1469,6 +1461,52 @@ void VPReplicateRecipe::print(raw_ostream &O, const
Twine &Indent,
}
#endif
+static bool isUniformAcrossVFsAndUFs(VPScalarCastRecipe *C) {
fhahn wrote:
Added comment + TODO, thanks!
https://github.com/llvm/llvm-project/pull/78113
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/78113
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@@ -230,7 +230,11 @@ Type *VPTypeAnalysis::inferScalarType(const VPValue *V) {
return V->getUnderlyingValue()->getType();
})
.Case(
- [](const VPWidenCastRecipe *R) { return R->getResultType(); });
+ [](const VPWidenCast
https://github.com/fhahn commented:
Comments should be addressed and title & description updated, thanks!
https://github.com/llvm/llvm-project/pull/78113
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@@ -1469,6 +1461,52 @@ void VPReplicateRecipe::print(raw_ostream &O, const
Twine &Indent,
}
#endif
+static bool isUniformAcrossVFsAndUFs(VPScalarCastRecipe *C) {
+ return C->isDefinedOutsideVectorRegions() ||
+ isa(C->getOperand(0)) ||
+ isa(C->getOperand(0))
@@ -498,10 +498,34 @@ static VPValue *createScalarIVSteps(VPlan &Plan, const
InductionDescriptor &ID,
VPCanonicalIVPHIRecipe *CanonicalIV = Plan.getCanonicalIV();
Type *TruncTy = TruncI ? TruncI->getType() : IVTy;
VPValue *BaseIV = CanonicalIV;
fhahn wro
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78637
>From efd07e93aed51049ad3783c701284617ae446330 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Wed, 17 Jan 2024 11:11:59 +
Subject: [PATCH 1/7] [AArch64] Combine store (trunc X to <3 x i8>) to sequence
of ST1
@@ -21471,6 +21471,53 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT,
EVT DstVT) {
(SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
}
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, Selection
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78632
>From a786cdedc2c9a9898cd0b80d84f5b11aace5da1c Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Tue, 28 Nov 2023 15:44:02 +
Subject: [PATCH 1/6] [AArch64] Add custom lowering for load <3 x i8>.
Add custom comb
fhahn wrote:
> > Thanks, this is indeed more compact. I tried to massage the SelectionDAG
> > nodes to generate it
> > ([7cc78c5](https://github.com/llvm/llvm-project/commit/7cc78c52f481161d7195ac4c7f9ec05b1cd1f442))
> > but it appears there are some cases where this results in slightly more
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/7] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn commented:
Address latest comments, thanks!
https://github.com/llvm/llvm-project/pull/78113
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@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/78113
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@@ -859,6 +859,7 @@ class VPSingleDefRecipe : public VPRecipeBase, public
VPValue {
case VPRecipeBase::VPWidenIntOrFpInductionSC:
case VPRecipeBase::VPWidenPointerInductionSC:
case VPRecipeBase::VPReductionPHISC:
+case VPRecipeBase::VPScalarCastSC:
@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
@@ -1469,6 +1461,52 @@ void VPReplicateRecipe::print(raw_ostream &O, const
Twine &Indent,
}
#endif
+static bool isUniformAcrossVFsAndUFs(VPScalarCastRecipe *C) {
+ return C->isDefinedOutsideVectorRegions() ||
+ isa(C->getOperand(0)) ||
+ isa(C->getOperand(0))
@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78632
>From a786cdedc2c9a9898cd0b80d84f5b11aace5da1c Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Tue, 28 Nov 2023 15:44:02 +
Subject: [PATCH 1/7] [AArch64] Add custom lowering for load <3 x i8>.
Add custom comb
https://github.com/fhahn closed https://github.com/llvm/llvm-project/pull/78637
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https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/73158
>From 13a26e8e7440c3b501730b22588af393a3e543cd Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Thu, 6 Jul 2023 08:07:45 +0100
Subject: [PATCH 1/3] [VPlan] Implement cloning of VPlans.
This patch implements clonin
@@ -2694,6 +2852,9 @@ class VPlan {
/// been modeled in VPlan directly.
DenseMap SCEVToExpansion;
+ /// Construct an uninitialized VPlan, should be used for cloning only.
+ explicit VPlan() = default;
+
fhahn wrote:
Removed, thanks!
https://github.com/
@@ -614,6 +614,61 @@ void VPBasicBlock::print(raw_ostream &O, const Twine
&Indent,
printSuccessors(O, Indent);
}
#endif
+static void cloneCFG(VPBlockBase *Entry,
+ DenseMap &Old2NewVPBlocks);
fhahn wrote:
Updated as suggested and renamed
@@ -982,6 +1037,94 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -982,6 +1037,94 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -1594,6 +1657,13 @@ class VPWidenPHIRecipe : public VPHeaderPHIRecipe {
addOperand(Start);
}
+ VPRecipeBase *clone() override {
+auto *Res = new VPWidenPHIRecipe(cast(getUnderlyingInstr()),
fhahn wrote:
Changed to `llvm_unreachable`, thanks!
@@ -982,6 +1037,94 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -614,6 +614,61 @@ void VPBasicBlock::print(raw_ostream &O, const Twine
&Indent,
printSuccessors(O, Indent);
}
#endif
+static void cloneCFG(VPBlockBase *Entry,
+ DenseMap &Old2NewVPBlocks);
+
+static VPBlockBase *cloneVPB(VPBlockBase *BB) {
+ if (auto
@@ -614,6 +614,61 @@ void VPBasicBlock::print(raw_ostream &O, const Twine
&Indent,
printSuccessors(O, Indent);
}
#endif
+static void cloneCFG(VPBlockBase *Entry,
+ DenseMap &Old2NewVPBlocks);
+
+static VPBlockBase *cloneVPB(VPBlockBase *BB) {
+ if (auto
@@ -614,6 +614,61 @@ void VPBasicBlock::print(raw_ostream &O, const Twine
&Indent,
printSuccessors(O, Indent);
}
#endif
+static void cloneCFG(VPBlockBase *Entry,
+ DenseMap &Old2NewVPBlocks);
+
+static VPBlockBase *cloneVPB(VPBlockBase *BB) {
@@ -982,6 +1037,94 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/8] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
@@ -491,17 +491,39 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/78113
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@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
@@ -491,17 +491,39 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn commented:
Missed comments should be addressed now, seems I missed them in the GitHub UI
somehow
https://github.com/llvm/llvm-project/pull/78113
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@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
@@ -491,19 +491,41 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
@@ -491,17 +491,39 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/8] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/9] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
@@ -491,17 +491,38 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 1/9] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/78113
>From 36b085f21b76d7bf7c9965a86a09d1cef4fe9329 Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Sun, 14 Jan 2024 14:13:08 +
Subject: [PATCH 01/10] [VPlan] Add new VPUniformPerUFRecipe, use for step
truncation.
https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/73158
>From 13a26e8e7440c3b501730b22588af393a3e543cd Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Thu, 6 Jul 2023 08:07:45 +0100
Subject: [PATCH 1/3] [VPlan] Implement cloning of VPlans.
This patch implements clonin
@@ -491,17 +491,39 @@ void VPlanTransforms::removeDeadRecipes(VPlan &Plan) {
static VPValue *createScalarIVSteps(VPlan &Plan, const InductionDescriptor &ID,
ScalarEvolution &SE, Instruction *TruncI,
-Type
https://github.com/fhahn closed https://github.com/llvm/llvm-project/pull/78113
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https://github.com/fhahn updated https://github.com/llvm/llvm-project/pull/73158
>From 13a26e8e7440c3b501730b22588af393a3e543cd Mon Sep 17 00:00:00 2001
From: Florian Hahn
Date: Thu, 6 Jul 2023 08:07:45 +0100
Subject: [PATCH 1/4] [VPlan] Implement cloning of VPlans.
This patch implements clonin
@@ -982,6 +1037,92 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -982,6 +1037,92 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -982,6 +1037,92 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
fhahn wrote:
I left it as
@@ -982,6 +1037,92 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -982,6 +1037,92 @@ void VPlan::updateDominatorTree(DominatorTree *DT,
BasicBlock *LoopHeaderBB,
assert(DT->verify(DominatorTree::VerificationLevel::Fast));
}
+static void remapOperands(VPBlockBase *Entry, VPBlockBase *NewEntry,
+ DenseMap &Old2Ne
@@ -614,6 +614,61 @@ void VPBasicBlock::print(raw_ostream &O, const Twine
&Indent,
printSuccessors(O, Indent);
}
#endif
+static void cloneCFG(VPBlockBase *Entry,
+ DenseMap &Old2NewVPBlocks);
+
+static VPBlockBase *cloneVPB(VPBlockBase *BB) {
@@ -21248,6 +21297,51 @@ static SDValue foldTruncStoreOfExt(SelectionDAG &DAG,
SDNode *N) {
return SDValue();
}
+// A custom combine to lower load <3 x i8> as the more efficient sequence
+// below:
+//ldrb wX, [x0, #2]
+//ldrh wY, [x0]
+//orr wX, wY, wX, lsl #16
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