@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
Author: Clement Courbet
Date: 2025-01-16T17:06:05+01:00
New Revision: 18196466238ff25d5c76906645ba1d92f08bd0f7
URL:
https://github.com/llvm/llvm-project/commit/18196466238ff25d5c76906645ba1d92f08bd0f7
DIFF:
https://github.com/llvm/llvm-project/commit/18196466238ff25d5c76906645ba1d92f08bd0f7.dif
https://github.com/legrosbuffle closed
https://github.com/llvm/llvm-project/pull/123060
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@@ -3183,10 +3183,24 @@ Expr *Expr::IgnoreUnlessSpelledInSource() {
}
return E;
};
+
+ auto IgnoreImplicitCallSingleStep = [](Expr *E) {
+if (auto *C = dyn_cast(E)) {
+ auto NumArgs = C->getNumArgs();
+ if (NumArgs == 1 ||
+ (NumArgs > 1 && isa
https://github.com/cor3ntin approved this pull request.
LGTM modulo comment request.
Thanks
https://github.com/llvm/llvm-project/pull/122265
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@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
cor3ntin wrote:
@antangelo @hokein What's the status here?
If this is not merged by next week it won't make clang 20 (and there are
unaddressed comments)
Thanks!
https://github.com/llvm/llvm-project/pull/98788
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@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,82 @@
+//===-- RISCVInstrInfoXMips.td -*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -514,6 +514,78 @@ class RVInstJ
+: RVInst {
+ bits<7> imm7;
+ bits<5> rs1;
+ bits<5> rd1;
+ bits<5> rd2;
+
+ let Inst{31-27} = rd2;
+ let Inst{26-23} = imm7{6-3};
+ let Inst{22-20} = 0b000;
+ let Inst{19-15} = rs1;
+ let Inst{14-12} = 0b100;
+ let Inst{11-7} = rd1
@@ -514,6 +514,78 @@ class RVInstJ
+: RVInst {
+ bits<7> imm7;
+ bits<5> rs1;
+ bits<5> rd1;
+ bits<5> rd2;
+
+ let Inst{31-27} = rd2;
+ let Inst{26-23} = imm7{6-3};
+ let Inst{22-20} = 0b000;
+ let Inst{19-15} = rs1;
+ let Inst{14-12} = 0b100;
+ let Inst{11-7} = rd1
Author: CarolineConcatto
Date: 2025-01-16T16:13:55Z
New Revision: 66d347b46fe7643c2721738d61cbdadb7edbcb8b
URL:
https://github.com/llvm/llvm-project/commit/66d347b46fe7643c2721738d61cbdadb7edbcb8b
DIFF:
https://github.com/llvm/llvm-project/commit/66d347b46fe7643c2721738d61cbdadb7edbcb8b.diff
L
https://github.com/CarolineConcatto closed
https://github.com/llvm/llvm-project/pull/123197
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@@ -0,0 +1,130 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/topperc edited
https://github.com/llvm/llvm-project/pull/121394
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@@ -2412,6 +2412,102 @@ bool SemaHLSL::CheckCompatibleParameterABI(FunctionDecl
*New,
return HadError;
}
+// Generally follows PerformScalarCast, with cases reordered for
+// clarity of what types are supported
+bool SemaHLSL::CanPerformScalarCast(QualType SrcTy, QualType D
@@ -3591,15 +3591,20 @@ static void handleInitPriorityAttr(Sema &S, Decl *D,
const ParsedAttr &AL) {
return;
}
+ if (prioritynum < 0 || prioritynum > 65535) {
erichkeane wrote:
checking `<0` is silly, it is an unsigned argument.
https://github.com/l
@@ -3591,15 +3591,20 @@ static void handleInitPriorityAttr(Sema &S, Decl *D,
const ParsedAttr &AL) {
return;
}
+ if (prioritynum < 0 || prioritynum > 65535) {
+S.Diag(AL.getLoc(), diag::err_attribute_argument_out_of_range)
+<< E->getSourceRange() << AL << 0
kuilpd wrote:
Updated code, fixed nits.
@Fznamznon Does this look good to you too?
https://github.com/llvm/llvm-project/pull/120965
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https://github.com/erichkeane commented:
2 nits, else this is on the right track.
https://github.com/llvm/llvm-project/pull/121577
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https://github.com/inbelic edited
https://github.com/llvm/llvm-project/pull/122981
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 06bb0e1c57e338923749826941c27b658338b540 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 12:20:56 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
cor3ntin wrote:
@erichkeane this is still doing lexing things in Sema, I was actually wondering
if you had suggestions :D
https://github.com/llvm/llvm-project/pull/117953
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https://github.com/inbelic updated
https://github.com/llvm/llvm-project/pull/122981
>From c1fc823abf07dfb8326b6190672d9881890bbb15 Mon Sep 17 00:00:00 2001
From: Finn Plummer
Date: Tue, 14 Jan 2025 22:22:45 +
Subject: [PATCH 1/5] [HLSL][RootSignature] Implement Lexing of
DescriptorTables
https://github.com/inbelic updated
https://github.com/llvm/llvm-project/pull/122982
>From 6a11fba7ecdb78b2ba1e63773a30b32109f6d78e Mon Sep 17 00:00:00 2001
From: Finn Plummer
Date: Tue, 14 Jan 2025 22:22:45 +
Subject: [PATCH 1/3] [HLSL][RootSignature] Implement Lexing of
DescriptorTables
https://github.com/dipeshs809 updated
https://github.com/llvm/llvm-project/pull/117149
>From c55e4eedcddf6bad5191eae87a01f933267b83fa Mon Sep 17 00:00:00 2001
From: dipeshs809
Date: Thu, 21 Nov 2024 17:48:22 +0530
Subject: [PATCH] [clang] guard __STDC_NO_THREADS__ defination for MSVCVersion
20
https://github.com/AaronBallman commented:
Thank you for working on this! I had an idea that might be an improved
approach, but the general idea of the patch is great. I think this can likely
land without a change to `clang/docs/ReleaseNotes.rst` because it's a minor
wording improvement, but y
@@ -9804,12 +9804,22 @@ bool InitializationSequence::Diagnose(Sema &S,
case FK_ConversionFailed: {
QualType FromType = OnlyArg->getType();
-PartialDiagnostic PDiag = S.PDiag(diag::err_init_conversion_failed)
- << (int)Entity.getKind()
- << DestType
- <
https://github.com/AaronBallman edited
https://github.com/llvm/llvm-project/pull/82109
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https://github.com/llvm/llvm-project/pull/123140
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@@ -2576,3 +2576,162 @@ void SemaHLSL::processExplicitBindingsOnDecl(VarDecl
*VD) {
}
}
}
+
+static bool CastInitializer(Sema &S, ASTContext &Ctx, Expr *E,
+llvm::SmallVectorImpl &List,
+llvm::SmallVectorImpl &DestT
@@ -0,0 +1,69 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute
-finclude-default-header -verify -Wdouble-promotion -Wconversion %s
+
+struct TwoFloats {
+ float X, Y;
+};
+
+struct TwoInts {
+ int Z, W;
+};
+
+struct Doggo {
+ int4 LegState;
+ int TailState;
+ f
@@ -0,0 +1,69 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute
-finclude-default-header -verify -Wdouble-promotion -Wconversion %s
+
+struct TwoFloats {
+ float X, Y;
+};
+
+struct TwoInts {
+ int Z, W;
+};
+
+struct Doggo {
+ int4 LegState;
+ int TailState;
+ f
https://github.com/Michael137 updated
https://github.com/llvm/llvm-project/pull/122265
>From b43ffd0c1bb6e4f1ca5b8458848f574480021b08 Mon Sep 17 00:00:00 2001
From: Michael Buch
Date: Thu, 9 Jan 2025 10:01:31 +
Subject: [PATCH 1/8] [clang][DebugInfo] Expand detection of structured
bindings
https://github.com/Michael137 updated
https://github.com/llvm/llvm-project/pull/122265
>From b43ffd0c1bb6e4f1ca5b8458848f574480021b08 Mon Sep 17 00:00:00 2001
From: Michael Buch
Date: Thu, 9 Jan 2025 10:01:31 +
Subject: [PATCH 1/8] [clang][DebugInfo] Expand detection of structured
bindings
@@ -3183,10 +3183,24 @@ Expr *Expr::IgnoreUnlessSpelledInSource() {
}
return E;
};
+
+ auto IgnoreImplicitCallSingleStep = [](Expr *E) {
+if (auto *C = dyn_cast(E)) {
+ auto NumArgs = C->getNumArgs();
+ if (NumArgs == 1 ||
+ (NumArgs > 1 && isa
Author: Kazu Hirata
Date: 2025-01-16T08:45:03-08:00
New Revision: 286f8423c5e26df0743e47931d840b6226ae6a8c
URL:
https://github.com/llvm/llvm-project/commit/286f8423c5e26df0743e47931d840b6226ae6a8c
DIFF:
https://github.com/llvm/llvm-project/commit/286f8423c5e26df0743e47931d840b6226ae6a8c.diff
L
Author: Kazu Hirata
Date: 2025-01-16T08:44:15-08:00
New Revision: c969964e7b1e9ce231fdf032be6c14cc8cd0be88
URL:
https://github.com/llvm/llvm-project/commit/c969964e7b1e9ce231fdf032be6c14cc8cd0be88
DIFF:
https://github.com/llvm/llvm-project/commit/c969964e7b1e9ce231fdf032be6c14cc8cd0be88.diff
L
Author: Kazu Hirata
Date: 2025-01-16T08:44:37-08:00
New Revision: dea4e613a05cd7d7438a365beb81998b36185ed9
URL:
https://github.com/llvm/llvm-project/commit/dea4e613a05cd7d7438a365beb81998b36185ed9
DIFF:
https://github.com/llvm/llvm-project/commit/dea4e613a05cd7d7438a365beb81998b36185ed9.diff
L
https://github.com/kazutakahirata closed
https://github.com/llvm/llvm-project/pull/123156
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vtjnash wrote:
This roughly corresponds to 921bd20dddf5080cdb36f39c0162eb63b2d5325e in Sema, I
think (@zygoloid). Maybe @tkremenek or @yronglin has done something in this
part of the code recently too as reviewers and to merge this?
https://github.com/llvm/llvm-project/pull/122330
https://github.com/erichkeane edited
https://github.com/llvm/llvm-project/pull/121577
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https://github.com/frasercrmck created
https://github.com/llvm/llvm-project/pull/123222
Missing half variants were also added.
The builtins are now consistently emitted in vector form (i.e., with a splat of
the literal to the appropriate vector size).
>From abe207cb6b90597a4f90a1db922c63ceb97
efriedma-quic wrote:
The two issues are sort of tied together: if the intrinsic isn't IntrNoMem, I
suspect the assumption cache stops cooperating.
But anyway, I guess the question is really whether we want these constructs
represented explicitly in IR, to try to leverage the AssumptionCache, o
frasercrmck wrote:
I wasn't able to verify the `half` variants with the OpenCL CTS for some
obscure CTS reason. Given that they're just casting the double literal to half
I think they're almost certainly correct.
https://github.com/llvm/llvm-project/pull/123222
@@ -323,9 +321,10 @@ bfloat16x8_t test_vcvtq_low_bf16_f32(float32x4_t a) {
// CHECK-A64-NEXT: entry:
// CHECK-A64-NEXT:[[TMP0:%.*]] = bitcast <8 x bfloat> [[INACTIVE:%.*]] to
<16 x i8>
// CHECK-A64-NEXT:[[TMP1:%.*]] = bitcast <4 x float> [[A:%.*]] to <16 x i8>
-// CHE
https://github.com/a-tarasyuk updated
https://github.com/llvm/llvm-project/pull/106036
>From ef0f3551dbb3ce61c57a5ad044d86b504c7742e0 Mon Sep 17 00:00:00 2001
From: Oleksandr T
Date: Tue, 10 Sep 2024 02:35:43 +0300
Subject: [PATCH 1/3] [Clang] restrict use of attribute names reserved by the
C+
https://github.com/V-FEXrt edited
https://github.com/llvm/llvm-project/pull/122981
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Author: cor3ntin
Date: 2025-01-16T17:50:31+01:00
New Revision: b311ab0f89980105a11f7bff5c6e7dd95d5c86fa
URL:
https://github.com/llvm/llvm-project/commit/b311ab0f89980105a11f7bff5c6e7dd95d5c86fa
DIFF:
https://github.com/llvm/llvm-project/commit/b311ab0f89980105a11f7bff5c6e7dd95d5c86fa.diff
LOG:
https://github.com/cor3ntin closed
https://github.com/llvm/llvm-project/pull/123209
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https://github.com/AidanGoldfarb edited
https://github.com/llvm/llvm-project/pull/122754
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 1b13d1465c90e3f6021628d723d807bdf4d155a8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 11:59:06 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
@@ -0,0 +1,130 @@
+//=== ParseHLSLRootSignatureTest.cpp - Parse Root Signature tests
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
erichkeane wrote:
> @erichkeane this is still doing lexing things in Sema, I was actually
> wondering if you had suggestions :D
Ah, i thought I'd mentioned on this before. Yeah, I very much would expect all
of the work this is doing to be possible in the parser. Sema shouldn't be
setting ra
fmayer wrote:
> Seems like the root cause was an vectorizer bug, sent
> https://github.com/llvm/llvm-project/pull/120730 that fixes it.
This is landed, so from that side we could reland this.
https://github.com/llvm/llvm-project/pull/119225
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https://github.com/llvm/llvm-project/pull/122982
>From 6a11fba7ecdb78b2ba1e63773a30b32109f6d78e Mon Sep 17 00:00:00 2001
From: Finn Plummer
Date: Tue, 14 Jan 2025 22:22:45 +
Subject: [PATCH 1/6] [HLSL][RootSignature] Implement Lexing of
DescriptorTables
https://github.com/kiranchandramohan updated
https://github.com/llvm/llvm-project/pull/123097
>From a58bb993f00f65ff4f4500b10c16939857ed25a0 Mon Sep 17 00:00:00 2001
From: Kiran Chandramohan
Date: Wed, 15 Jan 2025 17:33:00 +
Subject: [PATCH] =?UTF-8?q?Revert=20"Revert=20"[Flang][Driver]=20A
asl wrote:
Looks like ignoring `noexcept` made the everything even more cleaner :)
https://github.com/llvm/llvm-project/pull/109056
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https://github.com/AidanGoldfarb edited
https://github.com/llvm/llvm-project/pull/122754
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AaronBallman wrote:
> @AaronBallman @erichkeane I’ve switched back to the version without the std
> check. should the diagnostic group be changed?
I think we're fine to leave it as-is.
https://github.com/llvm/llvm-project/pull/106036
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Endilll wrote:
I'm sorry it took us a while.
The first step is to get the PR out of draft state.
https://github.com/llvm/llvm-project/pull/115234
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@@ -760,6 +760,7 @@ def AmbiguousMacro : DiagGroup<"ambiguous-macro">;
def KeywordAsMacro : DiagGroup<"keyword-macro">;
def ReservedIdAsMacro : DiagGroup<"reserved-macro-identifier">;
def ReservedIdAsMacroAlias : DiagGroup<"reserved-id-macro",
[ReservedIdAsMacro]>;
+def Reserv
llvm-beanz wrote:
> I was kind of hoping we might be able to generate the accesses off a handle
> during codegen when the global is accessed. I'm not sure if that's possible
> though.
I'm concerned that this will be more complex to make work with the other CBV
syntaxes. For example, the impli
Author: Adam Yang
Date: 2025-01-16T10:35:23-08:00
New Revision: 4446a9849aaa7e33e0d544fa6501d3d851b25fd6
URL:
https://github.com/llvm/llvm-project/commit/4446a9849aaa7e33e0d544fa6501d3d851b25fd6
DIFF:
https://github.com/llvm/llvm-project/commit/4446a9849aaa7e33e0d544fa6501d3d851b25fd6.diff
LOG
https://github.com/adam-yang closed
https://github.com/llvm/llvm-project/pull/118580
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jeremy-rifkin wrote:
Hi Erich, thanks for taking a look.
My preference here would be to explicitly mark the default path as unreachable
as such if the intent of the code is that the code path should be unreachable,
similar to how one might write:
```cpp
bool is_prime(int num) {
if(num < 0)
erichkeane wrote:
Hmm... This isn't really my area of expertise, but I consider those types of
warnings valuable. While it isn't technically 'unreachable', it IS by intent of
the code. Is there perhaps some sort of annotation on the struct we have that
we could skip this assumption on instead
Author: Nico Weber
Date: 2025-01-16T09:33:01-05:00
New Revision: 7dd34baf5505d689161c3a8678322a394d7a2929
URL:
https://github.com/llvm/llvm-project/commit/7dd34baf5505d689161c3a8678322a394d7a2929
DIFF:
https://github.com/llvm/llvm-project/commit/7dd34baf5505d689161c3a8678322a394d7a2929.diff
LO
llvm-beanz wrote:
A couple notes for myself:
* I need to write some AST tests
* Also need to write tests to cover bit fields and unions.
https://github.com/llvm/llvm-project/pull/123141
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https://li
https://github.com/erichkeane approved this pull request.
https://github.com/llvm/llvm-project/pull/123209
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VitaNuo wrote:
> need to pass -std=c++20.
> passing -DLLVM_USE_SANITIZER=Address in your cmake configuration should be
> enough for that.
Makes sense, I could reproduce the example.
https://github.com/llvm/llvm-project/pull/118480
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nico wrote:
Reverted in 7dd34baf5505d689161c3a8678322a394d7a2929 for now.
https://github.com/llvm/llvm-project/pull/119340
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https://github.com/cor3ntin created
https://github.com/llvm/llvm-project/pull/123209
A canonicalized pack indexing should refer to a canonicalized pattern
Fixes #123033
>From 6b533adf454e59db7a4afec8b91e1770875be588 Mon Sep 17 00:00:00 2001
From: Corentin Jabot
Date: Thu, 16 Jan 2025 15:33:01
Author: Alexandros Lamprineas
Date: 2025-01-16T14:51:14Z
New Revision: 9033e0c2d22c9f247eccea50ae8c975eb3468ac1
URL:
https://github.com/llvm/llvm-project/commit/9033e0c2d22c9f247eccea50ae8c975eb3468ac1
DIFF:
https://github.com/llvm/llvm-project/commit/9033e0c2d22c9f247eccea50ae8c975eb3468ac1.di
https://github.com/rupprecht approved this pull request.
https://github.com/llvm/llvm-project/pull/123140
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@@ -553,6 +553,37 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+def XIANGSHAN_KUNMINGHU : RISCVProcessorModel<"xiangshan-kunmi
@@ -5335,6 +5335,230 @@ static void handlePreferredTypeAttr(Sema &S, Decl *D,
const ParsedAttr &AL) {
D->addAttr(::new (S.Context) PreferredTypeAttr(S.Context, AL, ParmTSI));
}
+// Returns vector of format attributes. There are no two attributes with same
+// arguments in r
@@ -5335,6 +5335,230 @@ static void handlePreferredTypeAttr(Sema &S, Decl *D,
const ParsedAttr &AL) {
D->addAttr(::new (S.Context) PreferredTypeAttr(S.Context, AL, ParmTSI));
}
+// Returns vector of format attributes. There are no two attributes with same
+// arguments in r
https://github.com/budimirarandjelovichtec edited
https://github.com/llvm/llvm-project/pull/105479
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https://github.com/daltenty approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/89279
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https://github.com/budimirarandjelovichtec edited
https://github.com/llvm/llvm-project/pull/105479
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https://github.com/budimirarandjelovichtec edited
https://github.com/llvm/llvm-project/pull/105479
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@@ -5335,6 +5335,230 @@ static void handlePreferredTypeAttr(Sema &S, Decl *D,
const ParsedAttr &AL) {
D->addAttr(::new (S.Context) PreferredTypeAttr(S.Context, AL, ParmTSI));
}
+// Returns vector of format attributes. There are no two attributes with same
+// arguments in r
VyacheslavLevytskyy wrote:
@farzonl Thank you for adding instcombine/pattern matching capabilities. LGTM
overall.
Maybe we should also document each transformation a bit in comments to the
corresponding function, so that we clearly see what kind of input we expect to
see to run the substitutio
VyacheslavLevytskyy wrote:
I see also some problems in test cases
https://github.com/llvm/llvm-project/pull/122839
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@@ -0,0 +1,31 @@
+//===--- DiagnosticIDs.inc --*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
https://github.com/kadircet requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/120321
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kadircet wrote:
we already have a concept of `DiagnosticID`. can we rename this to
`AllDiagnosticKinds.inc` ?
https://github.com/llvm/llvm-project/pull/120321
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h
https://github.com/CarolineConcatto approved this pull request.
Hi Momchil,
I debated on this change, because it is undoing what I did previously and it is
based on review feedback.
The implementation is fine and correct. It is a matter of principles.
I am going to approve because:
1) If we r
@@ -650,6 +655,8 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
// An ext_vector_type of Bool is really a vector of bits.
llvm::Type *IRElemTy = VT->isExtVectorBoolType()
? llvm::Type::getInt1Ty(getLLVMContext())
+
https://github.com/CarolineConcatto edited
https://github.com/llvm/llvm-project/pull/118969
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