Author: Albion Fung Date: 2021-09-30T22:36:13-05:00 New Revision: 29bb877499ce328f8f4a5d61e9bae94e5f97f908
URL: https://github.com/llvm/llvm-project/commit/29bb877499ce328f8f4a5d61e9bae94e5f97f908 DIFF: https://github.com/llvm/llvm-project/commit/29bb877499ce328f8f4a5d61e9bae94e5f97f908.diff LOG: [PowerPC] Fix lharx and lbarx builtin signatures The signatures for the PowerPC builtins lharx and lbarx are incorrect, and causes issues when used in a function that requires the return of the builtin to be promoted. This patch fixes these signatures. Differential revision: https://reviews.llvm.org/D110273 Added: Modified: clang/include/clang/Basic/BuiltinsPPC.def clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def index 26286c270905e..65f490a214bcb 100644 --- a/clang/include/clang/Basic/BuiltinsPPC.def +++ b/clang/include/clang/Basic/BuiltinsPPC.def @@ -74,8 +74,8 @@ BUILTIN(__builtin_ppc_fetch_and_swap, "UiUiD*Ui", "") BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "") BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "") BUILTIN(__builtin_ppc_lwarx, "iiD*", "") -BUILTIN(__builtin_ppc_lharx, "isD*", "") -BUILTIN(__builtin_ppc_lbarx, "UiUcD*", "") +BUILTIN(__builtin_ppc_lharx, "ssD*", "") +BUILTIN(__builtin_ppc_lbarx, "ccD*", "") BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "") BUILTIN(__builtin_ppc_stwcx, "iiD*i", "") BUILTIN(__builtin_ppc_sthcx, "isD*s", "") diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c b/clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c index 7c898f523dc85..0362ae389ba06 100644 --- a/clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c +++ b/clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c @@ -24,7 +24,7 @@ short test_lharx(volatile short *a) { return __lharx(a); } -char test_lbarx(volatile unsigned char *a) { +char test_lbarx(volatile char *a) { // CHECK-LABEL: @test_lbarx // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a) // CHECK-NON-PWR8-ERR: error: this builtin is only valid on POWER8 or later CPUs @@ -46,3 +46,18 @@ int test_sthcx(volatile short *a, short val) { // CHECK-NON-PWR8-ERR: error: this builtin is only valid on POWER8 or later CPUs return __sthcx(a, val); } + +// Extra test cases that previously caused error during usage. +int test_lharx_intret(volatile short *a) { + // CHECK-LABEL: @test_lharx_intret + // CHECK: %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(i16* %a) + // CHECK-NON-PWR8-ERR: error: this builtin is only valid on POWER8 or later CPUs + return __lharx(a); +} + +int test_lbarx_intret(volatile char *a) { + // CHECK-LABEL: @test_lbarx_intret + // CHECK: %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(i8* %a) + // CHECK-NON-PWR8-ERR: error: this builtin is only valid on POWER8 or later CPUs + return __lbarx(a); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
