@@ -1,23 +1,23 @@
-//===- AMDGPUOpenCLEnqueuedBlockLowering.h ---*-
C++-*-===//
+//===- AMDGPUExportKernelRuntimeHandles.h ---*- C++-*-===//
arsenm wrote:
My emacs certainly needs it
https://github.com/llvm/llvm-project/
@@ -1,23 +1,23 @@
-//===- AMDGPUOpenCLEnqueuedBlockLowering.h ---*-
C++-*-===//
+//===- AMDGPUExportKernelRuntimeHandles.h ---*- C++-*-===//
ssahasra wrote:
The requirement was dropped from the LLVM Coding Standards, and t
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128519
>From dbc5b3d20a4b1f989670e0b03c2a498695449313 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 23 Dec 2022 16:55:40 -0500
Subject: [PATCH 1/2] AMDGPU: Move enqueued block handling into clang
The previou
https://github.com/ssahasra commented:
I don't have recent exposure to the OpenCL implementation, but generally
eyeballed the code to make sure that the changes do what is described. Is there
some confidence that the new scheme actually works? For example, maybe an
existing CodeGen test where
@@ -614,6 +614,20 @@ void
AMDGPUTargetCodeGenInfo::setCUDAKernelCallingConvention(
FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
}
+/// Return IR struct type for rtinfo struct in rocm-device-libs used for device
+/// enqueue.
+///
+/// ptr addrspace(1) kernel_
https://github.com/ssahasra edited
https://github.com/llvm/llvm-project/pull/128519
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@@ -0,0 +1,110 @@
+//===- AMDGPUExportKernelRuntimeHandles.cpp - Lower enqueued block
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
arsenm wrote:
### Merge activity
* **Mar 10, 8:52 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/128519).
https://github.com/llvm/llvm-project/pull/128519
_
@@ -1734,6 +1735,29 @@ define amdgpu_kernel void @unknown_addrspace_kernarg(ptr
addrspace(12345) %ptr)
ret void
}
+; Make sure the device_enqueue_symbol is not reported
+; CHECK: - .args: []
+; CHECK-NEXT: .group_segment_fixed_size: 0
+; CHECK-NEXT: .kernarg_segme
llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `lld-x86_64-win` running on
`as-worker-93` while building `clang,llvm` at step 7
"test-build-unified-tree-check-all".
Full details are available at:
https://lab.llvm.org/buildbot/#/builders/146/builds/2459
Here is the releva
https://github.com/arsenm closed
https://github.com/llvm/llvm-project/pull/128519
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https://github.com/ssahasra approved this pull request.
https://github.com/llvm/llvm-project/pull/128519
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https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/128519
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@@ -1734,6 +1735,29 @@ define amdgpu_kernel void @unknown_addrspace_kernarg(ptr
addrspace(12345) %ptr)
ret void
}
+; Make sure the device_enqueue_symbol is not reported
+; CHECK: - .args: []
+; CHECK-NEXT: .group_segment_fixed_size: 0
+; CHECK-NEXT: .kernarg_segme
arsenm wrote:
> I don't have recent exposure to the OpenCL implementation, but generally
> eyeballed the code to make sure that the changes do what is described. Is
> there some confidence that the new scheme actually works?
Conformance test passes, which is all that really matters
https:
@@ -1,23 +1,23 @@
-//===- AMDGPUOpenCLEnqueuedBlockLowering.h ---*-
C++-*-===//
+//===- AMDGPUExportKernelRuntimeHandles.h ---*- C++-*-===//
ssahasra wrote:
Do we need the filename and the emacs marking on the first line a
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128519
>From 1b5f2f2355a7c10d702c29ea3c043ba8be9b5028 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 23 Dec 2022 16:55:40 -0500
Subject: [PATCH] AMDGPU: Move enqueued block handling into clang
The previous im
@@ -614,6 +614,20 @@ void
AMDGPUTargetCodeGenInfo::setCUDAKernelCallingConvention(
FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
}
+/// Return IR struct type for rtinfo struct in rocm-device-libs used for device
+/// enqueue.
+///
+/// ptr addrspace(1) kernel_
@@ -107,7 +107,7 @@ RawAddress CodeGenFunction::CreateTempAlloca(llvm::Type
*Ty, CharUnits Align,
// be different from the type defined by the language. For example,
// in C++ the auto variables are in the default address space. Therefore
// cast alloca to the default ad
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128519
>From 477a0f1dd42b20e5303a2b7ac68d2bf57ec7a47a Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Fri, 23 Dec 2022 16:55:40 -0500
Subject: [PATCH 1/2] AMDGPU: Move enqueued block handling into clang
The previou
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/128519
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
The previous implementation wasn't maintaining a faithful IR
representation of how this really works. The value returned by
createEnqueuedBlockKernel wasn't actually used as a function, and
hacked up
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/128519
The previous implementation wasn't maintaining a faithful IR
representation of how this really works. The value returned by
createEnqueuedBlockKernel wasn't actually used as a function, and
hacked up later to be a
arsenm wrote:
* **#128520** https://app.graphite.dev/github/pr/llvm/llvm-project/128520?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/>
* **#128519** https://app.graphite.dev/github/pr/llvm/llvm-p
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