[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-18 Thread Sam Elliott via cfe-commits
lenary wrote: Yeah, I went back and looked at that issue, it's helpful to know that it was more than just the register allocator, that it was also copy propagation, which wasn't obvious from the comments. The failing tests are not related, but presumably caused by the rebase, but I'll still

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-18 Thread Craig Topper via cfe-commits
topperc wrote: > I spent some time trying to write a test that should fail before, but doesn't > after, but it doesn't happen - I presume because x0 is reasonably dealt with > by the allocator. This maybe suggests the patch isn't needed? I'm not sure > why we do this for GPRs then. I think th

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-18 Thread Craig Topper via cfe-commits
https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/112563 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-18 Thread Sam Elliott via cfe-commits
https://github.com/lenary updated https://github.com/llvm/llvm-project/pull/112563 >From bbf0b885dc5912d4dc29abcec5fe7cee7cfd1758 Mon Sep 17 00:00:00 2001 From: Sam Elliott Date: Wed, 16 Oct 2024 05:04:45 -0700 Subject: [PATCH 1/2] [RISCV] Inline Assembly: RVC constraint and N modifier This ch

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-16 Thread Sam Elliott via cfe-commits
lenary wrote: I spent some time trying to write a test that should fail before, but doesn't after, but it doesn't happen - I presume because x0 is reasonably dealt with by the allocator. This maybe suggests the patch isn't needed? I'm not sure why we do this for GPRs then. https://github.com/

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-16 Thread Sam Elliott via cfe-commits
https://github.com/lenary updated https://github.com/llvm/llvm-project/pull/112563 >From bbf0b885dc5912d4dc29abcec5fe7cee7cfd1758 Mon Sep 17 00:00:00 2001 From: Sam Elliott Date: Wed, 16 Oct 2024 05:04:45 -0700 Subject: [PATCH 1/2] [RISCV] Inline Assembly: RVC constraint and N modifier This ch

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-16 Thread Sam Elliott via cfe-commits
lenary wrote: (My approach with the test was to try to use all 32 GPRs, so have it fail when it couldn't use x0 - doing so by marking ra, sp, gp, and tp as clobbered, and passing 28 floats) https://github.com/llvm/llvm-project/pull/112563 ___ cfe-com

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-16 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Sam Elliott (lenary) Changes I'm not sure if this fix is required, but I've written the patch anyway. This does not cause test changes, but we haven't got tests that try to use all 32 registers in inline assembly. Broadly, for G

[clang] [llvm] [RISCV][ISel] Ensure 'in X' Constraints prevent X0 (PR #112563)

2024-10-16 Thread Sam Elliott via cfe-commits
https://github.com/lenary created https://github.com/llvm/llvm-project/pull/112563 I'm not sure if this fix is required, but I've written the patch anyway. This does not cause test changes, but we haven't got tests that try to use all 32 registers in inline assembly. Broadly, for GPRs, we mad