https://github.com/Lukacma closed
https://github.com/llvm/llvm-project/pull/88114
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https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/88114
>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/5] WIP
---
clang/include/clang/Basic/arm_sme.td | 29 +
https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/88114
>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/4] WIP
---
clang/include/clang/Basic/arm_sme.td | 29 +
https://github.com/CarolineConcatto approved this pull request.
https://github.com/llvm/llvm-project/pull/88114
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@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+
+target triple = "aarch64-linux"
+
+define void @test_svzero_za64_vg1x2(i32 %slice) #0 {
--
https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/88114
>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/4] WIP
---
clang/include/clang/Basic/arm_sme.td | 29 +
https://github.com/Lukacma deleted
https://github.com/llvm/llvm-project/pull/88114
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@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+
+target triple = "aarch64-linux"
+
+define void @test_svzero_za64_vg1x2(i32 %slice) #0 {
--
https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/88114
>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/3] WIP
---
clang/include/clang/Basic/arm_sme.td | 29 +
@@ -4774,39 +4784,57 @@ class sme2p1_zero_matrix opc, Operand index_ty,
string mnemonic,
}
multiclass sme2p1_zero_matrix {
- def _VG2_Z : sme2p1_zero_matrix<{0b000,?,?,?}, sme_elm_idx0_7, mnemonic,
"vgx2"> {
+ def _VG2_Z : sme2p1_zero_matrix<{0b000,?,?,?}, sme_elm_idx0_7,
@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+
+target triple = "aarch64-linux"
+
+define void @test_svzero_za64_vg1x2(i32 %slice) #0 {
--
https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/88114
>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/2] WIP
---
clang/include/clang/Basic/arm_sme.td | 29 +
llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: None (Lukacma)
Changes
According to the specification in
https://github.com/ARM-software/acle/pull/309 this adds the intrinsics:
```
void svzero_za64_vg1x2(uint32_t slice)
__arm_streaming __arm_inout("za");
void svzero_za64_vg1x
https://github.com/Lukacma created
https://github.com/llvm/llvm-project/pull/88114
According to the specification in
https://github.com/ARM-software/acle/pull/309 this adds the intrinsics:
```
void svzero_za64_vg1x2(uint32_t slice)
__arm_streaming __arm_inout("za");
void svzero_za64_vg
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