[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

https://github.com/topperc closed https://github.com/llvm/llvm-project/pull/88538 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

https://github.com/preames approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/88538 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/88538 >From a27600bd46a784dbf028dba4153858700d7843af Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 12 Apr 2024 09:57:06 -0700 Subject: [PATCH 1/2] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V -O0

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

@@ -1,4 +1,4 @@ -// XFAIL: target={{.*}}-aix{{.*}} +// XFAIL: target={{.*}}-aix{{.*}}, target=riscv{{.*}} MaskRay wrote: Perhaps the commonplace `--target=x86_64` https://github.com/llvm/llvm-project/pull/88538 ___ cfe

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

@@ -1,4 +1,4 @@ -// XFAIL: target={{.*}}-aix{{.*}} +// XFAIL: target={{.*}}-aix{{.*}}, target=riscv{{.*}} topperc wrote: What triple should i use for the -mrelax-all test? https://github.com/llvm/llvm-project/pull/88538 __

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

@@ -1,4 +1,4 @@ -// XFAIL: target={{.*}}-aix{{.*}} +// XFAIL: target={{.*}}-aix{{.*}}, target=riscv{{.*}} MaskRay wrote: This causes different behaviors with the default target triple, which is probably not perfect. I think we can change the -mrelax-all check w

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

https://github.com/MaskRay approved this pull request. I left a comment at https://github.com/llvm/llvm-project/issues/87127#issuecomment-2063027106 This is more about a weird -O0 -mrelax-all behavior that RISC-V now opts out, which is good on its own, even if the basis looks like a self-infli

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

llvmbot wrote: @llvm/pr-subscribers-clang @llvm/pr-subscribers-clang-driver Author: Craig Topper (topperc) Changes -O0 implies -mrelax-all as an assembler compile time optimization. -mrelax-all allows the assembler to complete layout in 2 passes instead of doing iterative branch relaxati

[clang] [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (PR #88538)

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/88538 -O0 implies -mrelax-all as an assembler compile time optimization. -mrelax-all allows the assembler to complete layout in 2 passes instead of doing iterative branch relaxation. Jump offsets larger than +/-1MiB