@@ -145,9 +164,89 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -3413,13 +3415,34 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -145,9 +164,89 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -2835,6 +2862,10 @@ void PPCAIXAsmPrinter::emitInstruction(const
MachineInstr *MI) {
MMI->hasDebugInfo());
break;
}
+ case PPC::GETtlsMOD32AIX:
+ case PPC::GETtlsMOD64AIX:
+// A reference to .__tls_get_mod is unknown to the assembler so we need t
@@ -835,6 +848,10 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
if (Flag == PPCII::MO_TLSGD_FLAG || Flag == PPCII::MO_GOT_TLSGD_PCREL_FLAG)
return MCSymbolRefExpr::VariantKind::VK_PPC_AI
@@ -2645,10 +2653,14 @@ MCSection
*TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
const MCSymbol *Sym, const TargetMachine &TM) const {
// Use TE storage-mapping class when large code model is enabled so that
// the chance of needing -bbigtoc is decreased.
+ //
@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
stephenpeckham wrote:
This check (and other checks in this PR) does a stri
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -2385,6 +2385,13 @@ MCSection
*TargetLoweringObjectFileXCOFF::getSectionForExternalReference(
SmallString<128> Name;
getNameWithPrefix(Name, GO, TM);
+ // AIX TLS local-dynamic requires the setting for the specific symbol name.
amy-kwan wrote:
Maybe
@@ -2058,6 +2089,10 @@ void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV,
}
}
+ // Do not emit the _$TLSML symbol.
+ if (GVSym->getName() == "_Renamed..5f24__TLSML[TC]")
amy-kwan wrote:
Maybe a silly question, but will this always contain the `
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
https://github.com/amy-kwan commented:
I imagine this will be updated after 4b932d84f48e0f3f42c769a5ca7ce6623ab62f2e
so I plan to review again after.
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@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
@@ -1360,6 +1372,9 @@ void XCOFFObjectWriter::assignAddressesAndIndices(const
MCAsmLayout &Layout) {
// Calculate indices for undefined symbols.
for (auto &Csect : UndefinedCsects) {
+// AIX does not need to emit for the _$TLSML symbol.
+if (Csect.getSymbolTableNa
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
@@ -145,9 +160,78 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -649,6 +649,14 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
uint64_t &FixedValue) {
auto getIndex = [this](const MCSymbol *Sym,
const MCSectionXCOFF *ContainingCsect) {
+// Fixup relocat
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@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
"GETtls[ld]ADDR[32] must read GPR3");
if (Subtarget->isAIXABI()) {
-// On AIX, the variable offset should already be in R4 and the region
handle
-// should already be in R3.
-
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@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
"GETtls[ld]ADDR[32] must read GPR3");
if (Subtarget->isAIXABI()) {
-// On AIX, the variable offset should already be in R4 and the region
handle
-// should already be in R3.
-
@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
"GETtls[ld]ADDR[32] must read GPR3");
if (Subtarget->isAIXABI()) {
-// On AIX, the variable offset should already be in R4 and the region
handle
-// should already be in R3.
-
@@ -660,14 +671,16 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
"GETtls[ld]ADDR[32] must read GPR3");
if (Subtarget->isAIXABI()) {
-// On AIX, the variable offset should already be in R4 and the region
handle
-// should already be in R3.
-
@@ -757,6 +772,17 @@ getTOCEntryTypeForMO(const MachineOperand &MO) {
llvm_unreachable("Unexpected operand type to get TOC type.");
}
}
+
+// FIXME: find alternative approach to get rid of this hack.
+// On AIX, TLS-local-dynamic requires that the symbol for the module ha
@@ -370,11 +370,23 @@ namespace llvm {
/// G8RC = TLSGD_AIX, TOC_ENTRY, TOC_ENTRY
/// Op that combines two register copies of TOC entries
/// (region handle into R3 and variable offset into R4) followed by a
-/// GET_TLS_ADDR node which will be expanded to a cal
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -1622,6 +1629,9 @@ def TLSGDAIX8 :
"#TLSGDAIX8",
[(set i64:$rD,
(PPCTlsgdAIX i64:$offset, i64:$handle))]>;
+// This pseudo is expanded to load module-handle in X3, and the call to
GETtlsMOD64AIX.
-
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -6,6 +6,6 @@
#endif
static __thread int y __attribute((tls_model("global-dynamic"))); // no-warning
-static __thread int y __attribute((tls_model("local-dynamic"))); //
expected-error {{TLS model 'local-dynamic' is not yet supported on AIX}}
+static __thread int y __attrib
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -6,6 +6,6 @@
#endif
static __thread int y __attribute((tls_model("global-dynamic"))); // no-warning
-static __thread int y __attribute((tls_model("local-dynamic"))); //
expected-error {{TLS model 'local-dynamic' is not yet supported on AIX}}
+static __thread int y __attrib
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
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orcguru wrote:
> Also, is it intentional that we combined the patch to enable local-dynamic in
> clang within this patch? Just wondering since I thought I saw a separate
> patch for the clang portion before (unless I am mistaken).
Yes, I have to combine all changes into a monolithic patch, sim
@@ -6,6 +6,6 @@
#endif
static __thread int y __attribute((tls_model("global-dynamic"))); // no-warning
-static __thread int y __attribute((tls_model("local-dynamic"))); //
expected-error {{TLS model 'local-dynamic' is not yet supported on AIX}}
+static __thread int y __attrib
bzEq wrote:
> Also, is it intentional that we combined the patch to enable local-dynamic in
> clang within this patch?
Yes. For github's nature, we are unable to set parent PR in llvm-project repo,
so clang part is included in this PR.
https://github.com/llvm/llvm-project/pull/66316
_
amy-kwan wrote:
Also, is it intentional that we combined the patch to enable local-dynamic in
clang within this patch?
Just wondering since I thought I saw a separate patch for the clang portion
before (unless I am mistaken).
https://github.com/llvm/llvm-project/pull/66316
@@ -3412,13 +3414,28 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -231,12 +231,18 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
MCSymbolXCOFF *TCSym =
cast(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
- // On AIX, we have a region handle (symbol@m) and the variable offset
- /
@@ -370,11 +370,23 @@ namespace llvm {
/// G8RC = TLSGD_AIX, TOC_ENTRY, TOC_ENTRY
/// Op that combines two register copies of TOC entries
/// (region handle into R3 and variable offset into R4) followed by a
-/// GET_TLS_ADDR node which will be expanded to a cal
@@ -3281,6 +3288,9 @@ def TLSGDAIX : PPCEmitTimePseudo<(outs gprc:$rD), (ins
gprc:$offset, gprc:$handl
"#TLSGDAIX",
[(set i32:$rD,
(PPCTlsgdAIX i32:$offset, i32:$handle))]>;
+// This pseudo is expa
@@ -2710,6 +2758,15 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
MCSymbol *S = OutContext.getOrCreateSymbol(Name);
TCEntry = cast(
getObjFileLowering().getSectionForTOCEntry(S, TM));
+} else if (I.first.second ==
+ MCSymbolRefE
@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX
@@ -3412,13 +3414,28 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -846,6 +872,17 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;
if (MO.getTargetFlags() & PPCII::MO_TLSGD_FLAG)
return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;
+if (MO.getTarg
orcguru wrote:
> The code formatting check fails.
That is intentional:
https://github.com/llvm/llvm-project/pull/66316#discussion_r1333195506
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chenzheng1030 wrote:
The code formatting check fails.
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chenzheng1030 wrote:
> Is it possible that we fix the hack implementation with some future version
> (I will open an issue and work on it afterwards)? How about let's move on
> with current approach?
> @amy-kwan @stephenpeckham @bzEq @chenzheng1030 Appreciate your comments.
> Thank you!
I am
orcguru wrote:
I saw comments being folded, paste here for notice, sorry about the duplication:
So I did have another version which can essentially remove the assert check
with some side effects:
(1) It did generated extra external symbol reference, which looks like no harm
with simple HelloW
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
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@@ -116,6 +116,10 @@ std::pair
PPCXCOFFObjectWriter::getRelocTypeAndSignSize(
return {XCOFF::RelocationType::R_TLS_IE, SignAndSizeForFKData};
case MCSymbolRefExpr::VK_PPC_AIX_TLSLE:
return {XCOFF::RelocationType::R_TLS_LE, SignAndSizeForFKData};
+case MCSym
orcguru wrote:
> Missing an update in `recordRelocation()` similar as the patch:
> https://reviews.llvm.org/D155415.
>
> Working on it now.
Done. Added one test case aix-tls-ld-xcoff-reloc-large.ll to track this kind of
issue. If full set of test case is necessary, please let me know, and I w
orcguru wrote:
Missing an update in `recordRelocation()` similar as the patch:
https://reviews.llvm.org/D155415.
Working on it now.
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orcguru wrote:
When a module contains three TLS LD variables
>From assembly file generated by "as -a64 -many -o"
```
02f8 (idx: 33) a[TC]:
2f8: 00 00 00 00
02f8: R_TLS_LD (idx: 41) a[TL]
2fc: 00 00 00 00
0300 (idx: 35) _$T
orcguru wrote:
Currently obj mode has one issue: define more than one __thread variable, and
all access return the first variable.
I'm investigating the root cause and will update patch accordingly. ASM mode is
fine.
https://github.com/llvm/llvm-project/pull/66316
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@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
orcguru wrote:
> For below case:
>
> ```
> __thread extern int x = 42;
> __thread extern int y = 42;
> int main(void) {
>return x + y;
> }
> ```
>
> For now, we get:
>
> ```
> .main:
> # %bb.0:# %entry
> mflr 0
> stwu 1, -32(1)
> stw
orcguru wrote:
I'm working on environment issue, and will update remaining two LIT cases and
do testing etc.
I'm requesting another round of review in the mean time. Thank you all for your
inputs!
https://github.com/llvm/llvm-project/pull/66316
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@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
orcguru wrote:
> > The primary advantage of the local-dynamic access method is that you only
> > make a single function call to __tls_get_mod() and use the returned pointer
> > to get at all TLS variables. This implementation makes a function call for
> > every variable. The only thing you've
@@ -156,10 +156,11 @@ define void @storesTIInit(double %Val) #0 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT:mflr 0
; SMALL32-NEXT:stwu 1, -32(1)
-; SMALL32-NEXT:lwz 3, L..C4(2) # target-flags(ppc-lo) @TIInit
-; SMALL32-NEXT:lwz 4, L..C5(2) # target-flags
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
@@ -3412,13 +3416,23 @@ SDValue
PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TLSReg, VariableOffset);
}
- // Only Local-Exec, Initial-Exec and General-Dynamic TLS models are currently
- // supported models. If
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@@ -1771,9 +1771,13 @@ const char
*PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
case PPCISD::ADDIS_TLSGD_HA: return "PPCISD::ADDIS_TLSGD_HA";
case PPCISD::ADDI_TLSGD_L:return "PPCISD::ADDI_TLSGD_L";
case PPCISD::GET_TLS_ADDR:return "PPCISD::GET_
@@ -2826,6 +2877,8 @@ void PPCAIXAsmPrinter::emitInstruction(const MachineInstr
*MI) {
MMI->hasDebugInfo());
break;
}
+ case PPC::GETtlsMOD32AIX:
+ case PPC::GETtlsMOD64AIX:
case PPC::GETtlsTpointer32AIX:
case PPC::GETtlsADDR64AIX:
case PPC::GE
@@ -1362,6 +1402,8 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
*MI) {
case PPC::GETtlsADDRPCREL:
case PPC::GETtlsADDR32AIX:
case PPC::GETtlsADDR64AIX:
+ case PPC::GETtlsMOD32AIX:
orcguru wrote:
Added following description:
// Transfor
@@ -231,12 +231,15 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
MCSymbolXCOFF *TCSym =
cast(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
- // On AIX, we have a region handle (symbol@m) and the variable offset
- /
@@ -1622,6 +1629,10 @@ def TLSGDAIX8 :
"#TLSGDAIX8",
[(set i64:$rD,
(PPCTlsgdAIX i64:$offset, i64:$handle))]>;
+// This pseudo is expanded to one copy to put the module handle in R3, then
call
+// GETtlsMOD64AIX,
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github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff e057d8973cc6a9d0bcc5cc385f318a607d117693
c5779c1142936db45c1d0e2046ee5015a7d02fe9 --
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