llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `fuchsia-x86_64-linux`
running on `fuchsia-debian-64-us-central1-a-1` while building `clang` at step 4
"annotate".
Full details are available at:
https://lab.llvm.org/buildbot/#/builders/11/builds/14237
Here is the relevant
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/138158
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https://github.com/jhuber6 approved this pull request.
https://github.com/llvm/llvm-project/pull/138158
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https://github.com/jzc updated https://github.com/llvm/llvm-project/pull/138158
>From f1b0e2cbe8229ba00956e0eac58f97d71995b0dd Mon Sep 17 00:00:00 2001
From: "Cai, Justin"
Date: Mon, 14 Apr 2025 21:30:39 +
Subject: [PATCH 1/2] [Clang][SYCL] Add initial set of Intel OffloadArch values
---
c
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Justin Cai (jzc)
Changes
Following #137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL offloading. More
Intel architectures will be added in a future PR.
---
https://github.com/jzc created https://github.com/llvm/llvm-project/pull/138158
Following #137070, this PR adds an initial set of Intel `OffloadArch` values
with corresponding predicates that will be used in SYCL offloading. More Intel
architectures will be added in a future PR.
>From f1b0e2cb
