This revision was automatically updated to reflect the committed changes.
Closed by commit rG61cca0f2e5bb: [AArch64] Adding Neon Sm3 & Sm4 Intrinsics
(authored by pzheng).
Repository:
rG LLVM Github Monorepo
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rsanthir.quic added a comment.
@labrinea could you commit this when you have some time please?
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h
rsanthir.quic updated this revision to Diff 322470.
rsanthir.quic added a comment.
Updated test name and checks performed
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Files:
clang/include/clang/Basic/arm_neon.td
clang/lib/CodeGen/CGBuilti
t.p.northover added inline comments.
Comment at: clang/test/CodeGen/aarch64-neon-sm4-sm3.c:5
+
+// RUN: not %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
+// RUN: -S -emit-llvm -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NO-CRYPTO
%s
apazos wrot
apazos added inline comments.
Comment at: clang/test/CodeGen/aarch64-neon-sm4-sm3-invalid.c:8
+
+void test_range_check_vsm3tt1a(uint32x4_t a, uint32x4_t b, uint32x4_t c) {
+ // CHECK-RANGE: error: argument value 5 is outside the valid range [0, 3]
Consider renam
rsanthir.quic added a comment.
@t.p.northover Could you take a look before I ask for this to be merged?
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labrinea accepted this revision.
labrinea added a comment.
This revision is now accepted and ready to land.
LGTM, thanks @rsanthir.quic !
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rsanthir.quic updated this revision to Diff 320199.
rsanthir.quic marked an inline comment as done.
rsanthir.quic added a comment.
Corrected register ordering for sm4e and removed redundant argument in sm3ss1
test
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rsanthir.quic marked 2 inline comments as done.
rsanthir.quic added a comment.
Thank you for taking a look at this @labrinea !
Comment at: llvm/test/CodeGen/AArch64/neon-sm4-sm3.ll:77
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT:sm4e v1.4s, v0.4s
+; CHECK-NEXT:mov
