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Closed by commit rG6e0ae20f3b98: [VE] Support vector register in inline asm
(authored by kaz7).
Repository:
rG LLVM Github Monorepo
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kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: clang, VE.
Herald added a subscriber: cfe-commits.
kaz7 requested review of this revision.
Support a vector register constraint in inline asm of clang.
Add a regression test also.
Repository:
rG LLVM Git