[PATCH] D88759: [RISCV] Add SiFive cores to the CPU option

jrtc27 added a comment. In D88759#2313236 , @thakis wrote: > This seems to break tests: http://45.33.8.238/linux/29545/step_7.txt > > Can you take a look and revert for now if it takes a while to fix? I see it should already have been fixed in a48d480e1f

[PATCH] D88759: [RISCV] Add SiFive cores to the CPU option

thakis added a comment. This seems to break tests: http://45.33.8.238/linux/29545/step_7.txt Can you take a look and revert for now if it takes a while to fix? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88759/new/ https://reviews.llvm.org/D8875

[PATCH] D88759: [RISCV] Add SiFive cores to the CPU option

This revision was automatically updated to reflect the committed changes. Closed by commit rG5d6d8a2769b3: [RISCV] Add SiFive cores to the CPU option (authored by evandro). Herald added subscribers: cfe-commits, jrtc27. Herald added a project: clang. Changed prior to commit: https://reviews.llv