[PATCH] D79224: [WebAssembly] Renumber SIMD opcodes

2020-05-01 Thread Thomas Lively via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGe0f52842c8bc: [WebAssembly] Renumber SIMD opcodes (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D79224/new/ https://reviews.llvm.org/D

[PATCH] D79224: [WebAssembly] Renumber SIMD opcodes

2020-05-01 Thread Thomas Lively via Phabricator via cfe-commits
tlively marked 3 inline comments as done. tlively added inline comments. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:186 // 64x2 conversions are not in the spec -if (!Subtarget->hasUnimplementedSIMD128()) - for (auto Op : ahe

[PATCH] D79224: [WebAssembly] Renumber SIMD opcodes

2020-05-01 Thread Thomas Lively via Phabricator via cfe-commits
tlively updated this revision to Diff 261532. tlively added a comment. Herald added a project: clang. Herald added a subscriber: cfe-commits. - Remove i64x2 conversion ops in clang as well Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D79224/new/ ht