This revision was automatically updated to reflect the committed changes.
Closed by commit rL334751: [X86] Add inline assembly versions of
_InterlockedExchange_HLEAcquire/Release… (authored by ctopper, committed by ).
Herald added a subscriber: llvm-commits.
Changed prior to commit:
https://rev
craig.topper added a comment.
FWIW, I found a cfe-dev thread about adding HLE support
http://lists.llvm.org/pipermail/cfe-dev/2013-February/028031.html And a bunch
of dead patches in phabricator https://reviews.llvm.org/people/revisions/110/
I also spoke to Andi Kleen here at Intel to make sure
ethanhs accepted this revision.
ethanhs added a comment.
Works great!
https://reviews.llvm.org/D47672
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hans accepted this revision.
hans added a comment.
This revision is now accepted and ready to land.
Nice! Looks good to me.
https://reviews.llvm.org/D47672
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craig.topper updated this revision to Diff 151100.
craig.topper added a comment.
Inline assembly implementations.
https://reviews.llvm.org/D47672
Files:
lib/Headers/immintrin.h
lib/Headers/intrin.h
test/CodeGen/ms-intrinsics.c
Index: test/CodeGen/ms-intrinsics.c
=
craig.topper added a comment.
I'll give the inline assembly a shot.
Repository:
rC Clang
https://reviews.llvm.org/D47672
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ethanhs added a comment.
In https://reviews.llvm.org/D47672#1128863, @rnk wrote:
> In https://reviews.llvm.org/D47672#1128308, @hans wrote:
>
> > It sounds like adding proper support for HLE prefixes is a largeish project.
> >
> > ctopper, rnk: Do you think it would be worth adding inline asm ver
rnk added a comment.
In https://reviews.llvm.org/D47672#1128308, @hans wrote:
> It sounds like adding proper support for HLE prefixes is a largeish project.
>
> ctopper, rnk: Do you think it would be worth adding inline asm versions (with
> the xacquire/release prefixes) of these intrinsics in t
hans added a comment.
It sounds like adding proper support for HLE prefixes is a largeish project.
ctopper, rnk: Do you think it would be worth adding inline asm versions (with
the xacquire/release prefixes) of these intrinsics in the meantime? It would
inhibit optimizations but be better than
craig.topper added a comment.
It looks like gcc implements additional bits that can be passed to
_atomic_exchange and friends, __ATOMIC_HLE_ACQUIRE(1 << 16) and
__ATOMIC_HLE_RELEASE(1 << 17). Basically they're using bits above bit 16 in the
order/memory_model as target specific flags. These con
ethanhs added inline comments.
Comment at: lib/Headers/immintrin.h:387
+#if defined(__i386__) || defined(__x86_64__)
+static __inline__ long __DEFAULT_FN_ATTRS
+_InterlockedExchange_HLEAcquire(long volatile *_Target, long _Value) {
craig.topper wrote:
> what is _
ethanhs updated this revision to Diff 150189.
ethanhs added a comment.
Guard to be used only under MSVC, define default FN attrs
Repository:
rC Clang
https://reviews.llvm.org/D47672
Files:
lib/Headers/immintrin.h
lib/Headers/intrin.h
Index: lib/Headers/intrin.h
=
craig.topper added inline comments.
Comment at: lib/Headers/immintrin.h:387
+#if defined(__i386__) || defined(__x86_64__)
+static __inline__ long __DEFAULT_FN_ATTRS
+_InterlockedExchange_HLEAcquire(long volatile *_Target, long _Value) {
what is __DEFAULT_FN_ATTRS
craig.topper added a comment.
Fair enough, Then I think we should have a #ifdef _MSC_VER around them so they
are only available when pretending to be MSVC. I believe intrin.h does that
check very early in the file.
Repository:
rC Clang
https://reviews.llvm.org/D47672
ethanhs marked an inline comment as done.
ethanhs added a comment.
In https://reviews.llvm.org/D47672#1123953, @craig.topper wrote:
> We (Intel) have discussed this a little internally. I'll be responding more
> shortly.
Great!
FWIW, re intrin.h vs immintrin.h, the documentation for these put
craig.topper added a comment.
We (Intel) have discussed this a little internally. I'll be responding more
shortly.
Comment at: lib/Headers/immintrin.h:386
+\**/
+#if defined(__i386__) || defined(__x86_
rnk added a comment.
In https://reviews.llvm.org/D47672#1122013, @ethanhs wrote:
> In https://reviews.llvm.org/D47672#1121181, @rnk wrote:
>
> >
>
>
>
>
> > They are a hint to the processor that this is a short critical section, and
> > it is likely that the entire critical section can be entere
ethanhs added a comment.
In https://reviews.llvm.org/D47672#1121181, @rnk wrote:
>
> They are a hint to the processor that this is a short critical section, and
> it is likely that the entire critical section can be entered, run, and
> committed to memory before another thread needs to use
rnk added subscribers: craig.topper, chandlerc.
rnk added a comment.
I read up a little bit on TSX and HLE:
https://software.intel.com/en-us/node/524022
https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions
These HLE variants of the usual atomic exchange intrinsics add the `xacqu
ethanhs created this revision.
Herald added a subscriber: cfe-commits.
Adds MSVC intrinsics for atomic exchange and compare & exchange.
Repository:
rC Clang
https://reviews.llvm.org/D47672
Files:
lib/Headers/immintrin.h
lib/Headers/intrin.h
Index: lib/Headers/intrin.h
=
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