This revision was automatically updated to reflect the committed changes.
Closed by commit rL291544: AMD family 17h (znver1) enablement (authored by
ctopper).
Changed prior to commit:
https://reviews.llvm.org/D28018?vs=83626&id=83779#toc
Repository:
rL LLVM
https://reviews.llvm.org/D28018
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM
https://reviews.llvm.org/D28018
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RKSimon added a comment.
LGTM - @craig.topper any additional comments?
https://reviews.llvm.org/D28018
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GGanesh added a comment.
If Okay, can you please commit these on my behalf. I don't have write access.
https://reviews.llvm.org/D28018
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GGanesh added a comment.
Yes. True I mentioned that for the grouping or the order of the features
enabled. These initFeatureMap are done based on the intrinsics and the CodeGen
part.
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RKSimon added a comment.
In https://reviews.llvm.org/D28018#639765, @GGanesh wrote:
> Fallback to CK_BTVER1 is ok but not to CK_BTVER2. This is not possible
> because of the partial YMM writes. They have different behavior for znver1
> with AVX and their legacy SIMD counterparts. So, as of now
GGanesh updated this revision to Diff 83626.
GGanesh added a comment.
Fallback to CK_BTVER1 is ok but not to CK_BTVER2. This is not possible because
of the partial YMM writes. They have different behavior for znver1 with AVX and
their legacy SIMD counterparts. So, as of now leaving them to alpha
RKSimon added inline comments.
Comment at: lib/Basic/Targets.cpp:3189
break;
+ case CK_ZNVER1:
+setFeatureEnabledImpl(Features, "adx", true);
GGanesh wrote:
> RKSimon wrote:
> > Same as what I asked on D28017 - is there an accepted order that we should
GGanesh added inline comments.
Comment at: lib/Basic/Targets.cpp:3189
break;
+ case CK_ZNVER1:
+setFeatureEnabledImpl(Features, "adx", true);
RKSimon wrote:
> Same as what I asked on D28017 - is there an accepted order that we should be
> using here?
S
RKSimon added inline comments.
Comment at: lib/Basic/Targets.cpp:3189
break;
+ case CK_ZNVER1:
+setFeatureEnabledImpl(Features, "adx", true);
Same as what I asked on D28017 - is there an accepted order that we should be
using here?
https://reviews.ll
GGanesh removed rL LLVM as the repository for this revision.
GGanesh updated this revision to Diff 83566.
GGanesh added a comment.
The clzero builtins and feature addition will be handled separately in another
patch.
SSE4a and movbe are added to the ISA list.
https://reviews.llvm.org/D28018
Fi
RKSimon added a reviewer: RKSimon.
RKSimon added a comment.
Also, I don't think there is any clzero support on clang yet so adding that
feature probably isn't safe. You may need to put up a separate clzero patch for
review, preferably including _mm_clzero support to the headers as well.
Reposi
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