This revision was automatically updated to reflect the committed changes.
Closed by commit rG6bf66d839f13: [clang-format] Indent Verilog struct literal
on new line (authored by sstwcw).
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sstwcw updated this revision to Diff 533617.
sstwcw added a comment.
- limit change to Verilog
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D152623
Files:
clang/lib/Format/ContinuationIndenter.cpp
clang/un
sstwcw added a comment.
> So I assume your `'` is a 'DictLiteral`?
The brace following the quote is a `DictLiteral`. The quote is a
`tok::identifier` and `TT_Unknown`.
> Does it have to be one?
The brace is set to this type when used this way in all other languages. I
don't want to make an
HazardyKnusperkeks added a comment.
So I assume your `'` is a 'DictLiteral`? Does it have to be one? I don't know
what else maybe a `DictLiteral` in what language and am not so comfortable with
this change.
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sstwcw created this revision.
Herald added projects: All, clang, clang-format.
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Herald added reviewers: rymiel, HazardyKnusperkeks, owenpan, MyDeveloperDay.
sstwcw requested review of this revision.
Before:
c = //
'{default: 0};
After:
c = //
'