[PATCH] D145888: [clang-format] Fix non-case colons in Verilog case lines

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb688b58f83ce: [clang-format] Fix non-case colons in Verilog case lines (authored by sstwcw). Changed prior to commit: https://reviews.llvm.org/D14

[PATCH] D145888: [clang-format] Fix non-case colons in Verilog case lines

sstwcw marked an inline comment as done. sstwcw added inline comments. Comment at: clang/lib/Format/TokenAnnotator.cpp:4424 -if (Line.First->isOneOf(tok::kw_default, tok::kw_case)) - return Style.SpaceBeforeCaseColon; const FormatToken *Next = Right.getNextNonCommen

[PATCH] D145888: [clang-format] Fix non-case colons in Verilog case lines

MyDeveloperDay added inline comments. Comment at: clang/lib/Format/TokenAnnotator.cpp:4424 -if (Line.First->isOneOf(tok::kw_default, tok::kw_case)) - return Style.SpaceBeforeCaseColon; const FormatToken *Next = Right.getNextNonComment(); Hmm.. this

[PATCH] D145888: [clang-format] Fix non-case colons in Verilog case lines

sstwcw created this revision. sstwcw added reviewers: HazardyKnusperkeks, MyDeveloperDay, owenpan, rymiel. Herald added a project: All. sstwcw requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Back in D128714