[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked 3 inline comments as done. Conanap added inline comments. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machinein

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

nemanjai accepted this revision. nemanjai added a comment. LGTM aside from a small nit. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

amyk accepted this revision as: amyk. amyk added a comment. Also LGTM overall. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-m

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356562. Conanap added a comment. Removed entry from check Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/l

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

NeHuang accepted this revision as: NeHuang. NeHuang added a comment. This revision is now accepted and ready to land. Overall LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked an inline comment as done. Conanap added a comment. addressed comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 ___ cfe-commits mailing li

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356559. Conanap marked 4 inline comments as done. Conanap added a comment. Updated test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/c

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

NeHuang added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c:1 +// RUN: not %clang_cc1 -triple=powerpc-unknown-aix -O2 -S -emit-llvm %s -o - 2>&1 |\ +// RUN: FileCheck %s --check-prefix=CHECK32-ERROR `-S`

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356551. Conanap added a comment. Changed to ForceXForm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/lib/

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356546. Conanap marked 2 inline comments as done. Conanap added a comment. Updated IR test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/includ

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

stefanp added a comment. Overall I think this is fine. I just have a few nits. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:11 +int test_lwarx(volatile int* a) { + // CHECK: entry: + // CHECK: %0 = bitcast i32* %a to i8* Please

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356545. Conanap added a comment. Updated 64 bit error test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356542. Conanap added a comment. Added error test cases and sema checking Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsP

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

NeHuang added a comment. Please add the sema check & error test case for the two 64 bit only builtins `ldarx` and `stdcx` Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll:10 +declare i64 @llvm.ppc.ldarx(i8*) +define dso_local i64 @t

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked 3 inline comments as done. Conanap added a comment. Addressed comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 ___ cfe-commits mailing li

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356533. Conanap added a comment. Updated C test case name Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/l

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356532. Conanap added a comment. Changed test case file names Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def cla