[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:2288 + (mask_type V0), + VLOpFrag, (XLenVT GPR:$policy))), + (!cast(inst#"_"#kind#"_"#vlmul.MX#"_MASK") I think t

[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 370440. HsiangKai added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Tar

[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

craig.topper added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:169 + llvm_anyint_ty, LLVMMatchType<1>], [NoCapture>, IntrReadMem]>, RISCVVIntrinsic; // For unit stride fault-only-first load with mask ---

[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.

HsiangKai updated this revision to Diff 370285. HsiangKai added a comment. Update. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/ https://reviews.llvm.org/D105092 Files: llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Target/RISCV/