MarkMurrayARM added a comment.
Not sure yet.
Comment at: clang/test/CodeGen/arm-mve-intrinsics/admin.c:66
// CHECK-NEXT:[[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64
[[B:%.*]], i64 1
// CHECK-NEXT:ret <2 x i64> [[TMP1]]
//
Surely there is a p
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Use of bitcast resulted in lanes being swapped for vcreateq with big
endian. Fix this b
