[clang] [llvm] [RISCV] Add processor definition for XiangShan-KunMingHu-V2R2 (PR #123193)

cyyself wrote: I think some feature is missing here, such as "Zvbb". https://github.com/llvm/llvm-project/pull/123193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Support `norelax` attribute for RISCV (PR #115981)

cyyself wrote: > Two comments: > > * I don't think the c-api-doc change is going to be accepted at this rate I agree. I also changed my mind now through the discussion from the c-api-doc PR. https://github.com/llvm/llvm-project/pull/115981 ___ cfe-

[clang] [clang][RISCV] Support `norelax` attribute for RISCV (PR #115981)

cyyself wrote: > I disagree that this is a thing which should exist. It's solving the problem > in the wrong place. Since a clean solution needs GLIBC update, I think this can be a workaround now for some generated IFUNC resolvers, such as target_clones or target_versions. https://github.com/

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

cyyself wrote: I have a question: SpacemiT-X60 does not support Zicclsm on Vector, which is the same as K230, as discussed in #88029 . Is the Zicclsm safe here? https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@l

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

@@ -2002,6 +2003,76 @@ bool sys::getHostCPUFeatures(StringMap &Features) { return true; } +#elif defined(__linux__) && defined(__riscv) +// struct riscv_hwprobe +struct RISCVHwProbe { + int64_t Key; + uint64_t Value; +}; +bool sys::getHostCPUFeatures(StringMap &Features) {