@@ -8789,8 +9029,535 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8789,8 +9029,535 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8789,8 +9029,535 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8789,8 +9029,535 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8703,51 +8738,256 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condition code
- // set by the CCReg instruction using the CCValid / CCMask
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
uweigand wrote:
Both `clang-s390x-linux` and `clang-s390x-linux-lnt` failed with the same
`Clang::bindings.sh` error:
https://lab.llvm.org/buildbot/#/builders/42/builds/5208
https://lab.llvm.org/buildbot/#/builders/136/builds/4462
The `clang-s390x-linux-multistage` run including this change did
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8695,6 +8730,106 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // CCMask for ICmp is equal to 0, 1, 2 or 3.
+ const auto CCMaskForICmpEQCCVal = [](unsigned CC) {
+assert(CC < 4 && "CC out of
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8981,499 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/125970
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https://github.com/uweigand commented:
Once again not a full review, but comments on the combiner changes.
https://github.com/llvm/llvm-project/pull/125970
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@@ -8695,6 +8730,106 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // CCMask for ICmp is equal to 0, 1, 2 or 3.
+ const auto CCMaskForICmpEQCCVal = [](unsigned CC) {
+assert(CC < 4 && "CC out of
@@ -8728,9 +8928,9 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
auto *FalseVal = dyn_cast(CompareLHS->getOperand(1));
if (!FalseVal)
return false;
-if (CompareRHS->getAPIntValue() == FalseVal->getAPIntValue())
+if (CompareRHS-
@@ -8695,6 +8730,83 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // CCMask for ICmp is equal to 0, 1, 2 or 3.
+ const auto CCMaskForICmpEQCCVal = [](unsigned CC) {
+assert(CC < 4 && "CC out of
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8695,6 +8730,83 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // CCMask for ICmp is equal to 0, 1, 2 or 3.
+ const auto CCMaskForICmpEQCCVal = [](unsigned CC) {
+assert(CC < 4 && "CC out of
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8781,8 +8958,483 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_ccmask_a (select_ccmask_b)), where select_ccmas
@@ -8695,6 +8730,83 @@ SDValue SystemZTargetLowering::combineSETCC(
}
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // CCMask for ICmp is equal to 0, 1, 2 or 3.
+ const auto CCMaskForICmpEQCCVal = [](unsigned CC) {
+assert(CC < 4 && "CC out of
@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/145532
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@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
@@ -8781,8 +8961,445 @@ static bool combineCCMask(SDValue &CCReg, int &CCValid,
int &CCMask) {
return false;
}
-SDValue SystemZTargetLowering::combineBR_CCMASK(
-SDNode *N, DAGCombinerInfo &DCI) const {
+// Combine (select_cc_a (select_cc_b)), where select_cc_a has one
@@ -76,6 +76,7 @@ class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public
TargetInfo {
MinGlobalAlign = 16;
HasUnalignedAccess = true;
if (Triple.isOSzOS()) {
+ HasFloat16 = false;
uweigand wrote:
Wouldn't this be the default anyway?
https:
https://github.com/uweigand approved this pull request.
I guess this is fine with me if this is what you want for z/OS. Note that on
Linux, _Float16 also wasn't supported previously, we've made the choice to add
it.
https://github.com/llvm/llvm-project/pull/145532
___
uweigand wrote:
> The clang patch was written the way it was because it was necessary to comply
> with the ABI rules. Strings passed to printf don't have any sort of alignment
> requirement, so you can't really appeal to the ABI rules here, I think?
Just to be clear, the ABI requirement is tha
https://github.com/uweigand approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/141110
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uweigand wrote:
@Endilll thanks for the heads-up! Looks like there has been some issue with
network connectivity in our test lab over the weekend. This is supposed to be
resolved now; I'll keep observing the status for a bit.
https://github.com/llvm/llvm-project/pull/140378
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
https://github.com/uweigand commented:
Not a full review, just some initial comments on combineCCMask. I think it
would be good to have more comments explaining the specific transformations
you're attempting to implement, with an argument why they are correct for all
inputs.
https://github.
@@ -8694,66 +8726,455 @@ SDValue SystemZTargetLowering::combineSETCC(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
static bool combineCCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
- // We have a SELECT_CCMASK or BR_CCMASK comparing the condi
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/125970
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https://github.com/uweigand approved this pull request.
You might want to re-test after the recent merge of the z17 patch. Otherwise,
this now looks all good to me, a few further enhancement we discussed can be
done as follow-on. Thanks!
https://github.com/llvm/llvm-project/pull/109164
@@ -2,6 +2,16 @@
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; Test f316->i32.
uweigand wrote:
Comment typo.
https://github.com/llvm/llvm-project/pull/109164
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uweigand wrote:
/cherry-pick
https://github.com/llvm/llvm-project/commit/80267f81482486977b3bdecf3855fc6a3096f912
https://github.com/llvm/llvm-project/pull/135254
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uweigand wrote:
FYI @JonPsson1 @redstar
https://github.com/llvm/llvm-project/pull/135254
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uweigand wrote:
> > I see that the LowerOperationWrapper still emits i128 operations. (E.g. you
> > expand a f16->i128 into a f16->f32 and f32->i128) But that routine is
> > called because of the illegal input type i128, so I understand it must not
> > leave any operations with the illegal typ
uweigand wrote:
> Moved the comment "Promoting the result to i64...so use the default
> expansion" that was present in SystemZISelLowering.cpp into this method, but
> don't quite understand it fully. Is this talking about promoting to signed
> i64?
This is about whether we can (and should) im
@@ -2757,6 +2797,21 @@ static unsigned CCMaskForCondCode(ISD::CondCode CC) {
#undef CONV
}
+static unsigned CCMaskForSystemZCCVal(unsigned CC) {
uweigand wrote:
I don't think this is needed, this is simply `1 << (3 - CC)` or something. You
have similar code
@@ -8030,7 +8077,431 @@ SDValue SystemZTargetLowering::combineBSWAP(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
+static bool combineSRL_IPM_CCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // Convert CCVal to CCMask and update it along with
@@ -8113,10 +8583,151 @@ static bool combineCCMask(SDValue &CCReg, int
&CCValid, int &CCMask) {
CCReg = IPM->getOperand(0);
return true;
}
-
return false;
}
+std::optional
+SystemZTargetLowering::combineSELECT_CC_CCIPMMask(SDNode *N,
+
@@ -8113,10 +8583,151 @@ static bool combineCCMask(SDValue &CCReg, int
&CCValid, int &CCMask) {
CCReg = IPM->getOperand(0);
return true;
}
-
uweigand wrote:
These shouldn't be here.
https://github.com/llvm/llvm-project/pull/125970
_
@@ -8030,7 +8077,431 @@ SDValue SystemZTargetLowering::combineBSWAP(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
+static bool combineSRL_IPM_CCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // Convert CCVal to CCMask and update it along with
@@ -24,6 +24,7 @@
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsS390.h"
+#include "llvm/IR/PatternMatch.h"
uweigand wrote:
Is this really still necessary?
https://github.com/llvm/llvm-project/pull/125970
__
@@ -756,7 +768,11 @@ class SystemZTargetLowering : public TargetLowering {
SDValue combineINT_TO_FP(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue combineBSWAP(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue combineBR_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const;
+ std
@@ -1188,6 +1190,14 @@ class TargetInfo : public TransferrableTargetInfo,
TiedOperand = N;
// Don't copy Name or constraint string.
}
+
+// CC range can be set by target. SystemZ sets it to 4. It is 2 by default.
uweigand wrote:
Comment is
@@ -98,6 +98,15 @@ bool SystemZTargetInfo::validateAsmConstraint(
case 'T': // Likewise, plus an index
Info.setAllowsMemory();
return true;
+ case '@':
+// CC condition changes.
+if (StringRef(Name) == "@cc") {
+ Name += 2;
+ Info.setAllowsRegister(
@@ -8030,7 +8077,431 @@ SDValue SystemZTargetLowering::combineBSWAP(
return SDValue();
}
+// Combine IPM sequence for flag output operands.
+static bool combineSRL_IPM_CCMask(SDValue &CCReg, int &CCValid, int &CCMask) {
+ // Convert CCVal to CCMask and update it along with
@@ -1228,6 +1238,7 @@ class TargetInfo : public TransferrableTargetInfo,
std::string &/*SuggestedModifier*/) const {
return true;
}
+
uweigand wrote:
This shouldn't be here.
https://github.com/llvm/llvm-project/pull/125970
_
@@ -2601,7 +2601,7 @@ EmitAsmStores(CodeGenFunction &CGF, const AsmStmt &S,
const llvm::ArrayRef ResultRegDests,
const llvm::ArrayRef ResultRegQualTys,
const llvm::BitVector &ResultTypeRequiresCast,
- const llvm::BitVector
@@ -2621,9 +2621,18 @@ EmitAsmStores(CodeGenFunction &CGF, const AsmStmt &S,
if ((i < ResultRegIsFlagReg.size()) && ResultRegIsFlagReg[i]) {
// Target must guarantee the Value `Tmp` here is lowered to a boolean
// value.
- llvm::Constant *Two = llvm::Consta
@@ -12118,12 +12117,13 @@ void
SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
SDValue CondLHS = getValue(Cond);
EVT VT = CondLHS.getValueType();
SDLoc DL = getCurSDLoc();
+SDValue Cond;
SDValue Or = DAG.getNode(
@@ -2750,7 +2759,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
std::vector ArgElemTypes;
std::vector Args;
llvm::BitVector ResultTypeRequiresCast;
- llvm::BitVector ResultRegIsFlagReg;
+ std::vector ResultRegIsFlagReg;
uweigand wrote:
Agai
uweigand wrote:
> So this should already work. If it doesn't, you'll have to debug the build
> process here (e.g. look at preprocessed output to see what's actually going
> on here).
Ah, sorry, now I see what's going on. In this line you added to the cmake
logic:
```
set(s390x_SOURCES ${GENE
@@ -0,0 +1,27 @@
+//===-- lib/extendhfdf2.c - half -> single conversion -*- C
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
uweigand wrote:
> * However, if I removed the check for COMPILER_RT_HAS_FLOAT16 in the source
> files, it builds. Not sure why/if that is needed there (there is no check for
> it in e.g. extendhfdf2.c), or how it could be set.
This is set if the host compiler used to build compiler-rt supports
uweigand wrote:
> For the missing libfunctions, I see these files in compiler-rt/lib/builtins:
>
> ```
> compiler-rt/lib/builtins/extendhfsf2.c
> compiler-rt/lib/builtins/extendhftf2.c
> compiler-rt/lib/builtins/extendhfxf2.c
> ```
>
> For double, I get undefined reference to `__extendhfdf2' fr
uweigand wrote:
To clarify about soft-float - we do support `-msoft-float` as a compiler
option, but there is no actual soft-float library provided anywhere; never has
been. The compiler option is still useful in particular for the case of the
Linux kernel: kernel code does not actually have
uweigand wrote:
I think that compiler-rt should provide all six conversion routines (f16<->f32,
f16<->f64, f16<->f128), simply because libgcc has them and GCC-generated code
will use them, and compiler-rt is supposed to be usable as drop-in replacement.
Also, I think LLVM should ideally genera
uweigand wrote:
/cherry-pick
https://github.com/llvm/llvm-project/commit/ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
https://github.com/llvm/llvm-project/pull/129170
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uweigand wrote:
In the SystemZ tests, the variables involved have been deliberated marked
`volatile` to prevent this type of optimization (the tests are supposed to
verify the basic operation of the intrinsics). Does this new transformation
respect `volatile`?
https://github.com/llvm/llvm-pr
https://github.com/uweigand milestoned
https://github.com/llvm/llvm-project/pull/129170
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uweigand wrote:
> I'd like if this could also make it into a clang 19 release if possible.
I don't think there will be any further clang 19 releases. It should be
backported into clang 20, however.
https://github.com/llvm/llvm-project/pull/129170
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https://github.com/llvm/llvm-project/pull/129170
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https://github.com/uweigand approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/129170
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@@ -6470,6 +6540,84 @@ static SDValue lowerAddrSpaceCast(SDValue Op,
SelectionDAG &DAG) {
return Op;
}
+SDValue SystemZTargetLowering::lowerFP_EXTEND(SDValue Op,
+ SelectionDAG &DAG) const {
+ SDValue In = Op.getOperand(Op->isSt
@@ -6769,11 +6898,20 @@ SystemZTargetLowering::LowerOperationWrapper(SDNode *N,
break;
}
case ISD::BITCAST: {
+SDLoc DL(N);
SDValue Src = N->getOperand(0);
-if (N->getValueType(0) == MVT::i128 && Src.getValueType() == MVT::f128 &&
-!useSoftFloat())
@@ -179,20 +179,31 @@ bool SystemZABIInfo::isVectorArgumentType(QualType Ty)
const {
getContext().getTypeSize(Ty) <= 128);
}
-bool SystemZABIInfo::isFPArgumentType(QualType Ty) const {
+// The Size argument will in case of af an overaligned single element struct
+//
@@ -3830,6 +3876,14 @@ SDValue SystemZTargetLowering::lowerSELECT_CC(SDValue Op,
ISD::CondCode CC = cast(Op.getOperand(4))->get();
SDLoc DL(Op);
+ // SELECT_CC involving f16 will not have the cmp-ops promoted by the
+ // legalizer, as it will be handled according to the
@@ -6464,6 +6522,70 @@ static SDValue lowerAddrSpaceCast(SDValue Op,
SelectionDAG &DAG) {
return Op;
}
+SDValue SystemZTargetLowering::lowerFP_EXTEND(SDValue Op,
+ SelectionDAG &DAG) const {
+ SDValue In = Op.getOperand(Op->isSt
@@ -541,11 +543,26 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+setOperati
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