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@@ -3,6 +3,18 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
+; Test f16.
+declare half @llvm.fabs.f16(half %f)
+define half @f0(half %f) {
+; CHECK-LABEL: f0:
+; CHECK: brasl %r14, __
@@ -0,0 +1,65 @@
+; Test copysign intrinsics involving half.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+declare half @llvm.copysign.f16(half, half)
+declare float @llvm.copysign.f32(float, float)
+declare double @llvm.copysign.f64(double, double)
+
+; Test f16
@@ -126,3 +138,23 @@ define void @f9(ptr %cptr, ptr %aptr, ptr %bptr) {
store fp128 %c, ptr %cptr
ret void
}
+
+; Test f16 copies in which the sign comes from an f16.
+define half @f10(half %a, half %b) {
+; CHECK-LABEL: f10:
+; CHECK: brasl %r14, copysignh@PLT
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@@ -126,3 +138,23 @@ define void @f9(ptr %cptr, ptr %aptr, ptr %bptr) {
store fp128 %c, ptr %cptr
ret void
}
+
+; Test f16 copies in which the sign comes from an f16.
+define half @f10(half %a, half %b) {
+; CHECK-LABEL: f10:
+; CHECK: brasl %r14, copysignh@PLT
@@ -548,11 +543,28 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ if (!useSoftFloat()) {
+// Promote all f16 operations to float, with some exceptions below.
+for (unsigned Opc = 0; Opc < ISD::BUILTIN_
@@ -548,11 +543,28 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ if (!useSoftFloat()) {
+// Promote all f16 operations to float, with some exceptions below.
+for (unsigned Opc = 0; Opc < ISD::BUILTIN_
tgross35 wrote:
> > By the way, these sites are pretty helpful for double checking float reprs
> > https://float.exposed https://weitz.de/ieee/.
>
> I tried float.exposed but I couldn't really convert an f16 hex to a double
> hex. Is it supposed to be able to do this?
It should, on the `half`
tgross35 wrote:
Nothing about the implementation stands out to me as wrong. It looks like the
exponent isn't correct, I guess you could step through this portion
https://github.com/llvm/llvm-project/blob/ae42f071032b29821beef6a337712580861c/compiler-rt/lib/builtins/fp_extend_impl.inc#L65-L6
tgross35 wrote:
To clarify, the code is calling `__extendhfdf2` then `__truncdfhf2` from either
libgcc or from compiler-rt with your patches, and the compiler-rt version is
incorrect? Could you have it print the intermediate results as u16 hex (`Op0 +
Op1`, `Res2`, `Res`)?
Not sure if you are
tgross35 wrote:
@rnk (or anyone) would you be able to land this?
https://github.com/llvm/llvm-project/pull/115052
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tgross35 wrote:
If there isn't any reason to be consistent with the other LLVM targets then
agreed, using the direct libcalls seems better. The new library support could
likely land separately, right? As long as the lowering is correct, considering
this PR is already pretty expansive.
> To br
tgross35 wrote:
Looks like GCC uses option 3 https://gcc.godbolt.org/z/fM1EbK6Mn.
If you only need something to test against locally, I was able to get our s390x
rust dist built against your patches
https://github.com/rust-lang-ci/rust/actions/runs/13668570835.
`rust-std-s390x-unknown-linux-g
tgross35 wrote:
I think something like the following precedence would make sense for all
targets:
1. Direct asm: Lower to assembly if hardware support is available
2. Indirect mixed: libcall f16->f32 then asm the second conversion (f32->f64 or
f32->f128) if hardware is available. The advantage
tgross35 wrote:
In either case, I need to have the module flags available pretty early and I'm
not sure how to do that. Ideally they would be available when `TargetLowering`
is constructed or sometime before it is used for lowering, but it only gets a
`TargetMachine` as a paremeter. All values
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tgross35 wrote:
Thanks for answering that question, I wouldn't have had a good answer outside
of consistency. Does mid-level optimizations refer to optimizations done in
Clang rather than in LLVM?
Somebody will need to land this for me, the two commits should come separate
(first is NFC).
>
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 6afdfd07a22260914b45363870a7be54324bd736 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Add a test based
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 60b07161e8668c2bc3ee5d7a4c470a90a7673178 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Duplicate `win64
tgross35 wrote:
Finally getting around to this after more than a year. @efriedma-quic as an
alternative to the current implementation of duplicating `long double` layout
information from Clang to LLVM, would it work if LLVM lowers to `*f128` calls
but provides a module flag `fp128_use_long_dou
tgross35 wrote:
I updated this PR to pass indirectly and make the xmm0 return explicit,
identical to `i128`. This does not match GCC exactly since GCC's `__float128`
returns on the stack, unfortunately meaning cross-implementation is still
broken. I don't think that needs block the changes to
https://github.com/tgross35 edited
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>From 6afdfd07a22260914b45363870a7be54324bd736 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Add a test based
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 6afdfd07a22260914b45363870a7be54324bd736 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Add a test based
https://github.com/tgross35 edited
https://github.com/llvm/llvm-project/pull/115052
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https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 60b07161e8668c2bc3ee5d7a4c470a90a7673178 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Duplicate `win64
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 31405591b5661156348ec7a45e66eb43e0ace15b Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/6] [IR] Add a test for `f128` libcall lowering (nfc)
`f128` int
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From f110337467d5a2b1f624eab507daa2bc854def17 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
(nfc
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 60b07161e8668c2bc3ee5d7a4c470a90a7673178 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Duplicate `win64
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 60b07161e8668c2bc3ee5d7a4c470a90a7673178 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Duplicate `win64
@@ -255,4 +255,9 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
}
setLibcallName(RTLIB::MULO_I128, nullptr);
}
+
+ if (TT.isSystemZ()) {
+setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
+setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfs
tgross35 wrote:
What is needed to move this forward?
https://github.com/llvm/llvm-project/pull/109164
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@@ -255,4 +255,9 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
}
setLibcallName(RTLIB::MULO_I128, nullptr);
}
+
+ if (TT.isSystemZ()) {
+setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
+setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfs
@@ -513,11 +514,37 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+setOperati
@@ -255,4 +255,9 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
}
setLibcallName(RTLIB::MULO_I128, nullptr);
}
+
+ if (TT.isSystemZ()) {
+setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
+setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfs
@@ -255,4 +255,9 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
}
setLibcallName(RTLIB::MULO_I128, nullptr);
}
+
+ if (TT.isSystemZ()) {
+setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
+setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfs
tgross35 wrote:
It seems like arguments aren't actually getting passed indirectly to libcalls.
Simple test program
```c
#include
#include
union ty128 {
struct { uint64_t hi, lo; } u64x2;
__float128 f128;
};
void f128_add(__float128 a, __float128 b) {
union ty128 cvt;
cvt.f128 =
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple x86_64-windows-gnu -emit-llvm -o - %s \
+// RUN:| FileCheck %s --check-prefix=GNU64
+// __float128 is unsupported on MSVC
+
+__float128 fp128_ret(void) { return 0; }
+// GNU64: define dso_local void @fp128_ret(ptr dead_on_unwind noa
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/115052
>From 432e8a66156f08d45ad691017255364cfb0fd947 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Tue, 5 Nov 2024 07:00:35 -0500
Subject: [PATCH 1/2] [clang] Add fp128 ABI tests for MinGW (NFC)
Duplicate `win64
tgross35 wrote:
Cc @beetrees and @wesleywiser
https://github.com/llvm/llvm-project/pull/115052
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https://github.com/tgross35 created
https://github.com/llvm/llvm-project/pull/115052
Clang currently passes and returns `__float128` in vector registers on MinGW
targets. However, the Windows x86-64 calling convention [1] states the
following:
> __m128 types, arrays, and strings are never pas
tgross35 wrote:
> From what I can see in the libgcc sources, `__gnu_h2f_ieee`/`__gnu_f2h_ieee`
> is indeed always `i32`<->`i16`, but it is only present on 32-bit ARM, no
> other platforms. On AArch64, GCC will always use inline instructions to
> perform the conversion. On 32-bit and 64-bit Int
tgross35 wrote:
> With this version, the fp16 values are passed to conversion functions as
> integer, which seems to be the default. It is however a bit tricky to do this
> and at the same time pass half values in FP registers.
>
> At this point I wonder for one thing if it would be better to p
tgross35 wrote:
I'm struggling a bit with how to handle ABI information since that affects
layout (e.g. ARM aapcs), which I think explains most of the errors in
https://buildkite.com/llvm-project/github-pull-requests/builds/31198#018d26e2-fd17-4e15-a1eb-08580c189056.
This needs to be available
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From e869ad1bc601d95b6364dc5619e79a06e8b0fc82 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/5] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From e869ad1bc601d95b6364dc5619e79a06e8b0fc82 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From e869ad1bc601d95b6364dc5619e79a06e8b0fc82 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From e869ad1bc601d95b6364dc5619e79a06e8b0fc82 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 90a465d0a7e9744a4a8043152016e500927a0d95 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 90a465d0a7e9744a4a8043152016e500927a0d95 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 90a465d0a7e9744a4a8043152016e500927a0d95 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 90a465d0a7e9744a4a8043152016e500927a0d95 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 946581e0c6a06be92b16d74199b58a72be4b76f3 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 590f4920ceb1a80d711d39624b0249cd9ff774d2 Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
https://github.com/tgross35 updated
https://github.com/llvm/llvm-project/pull/76558
>From 7df4ef93989b1913d9200fbc29d6d04f9e59d51a Mon Sep 17 00:00:00 2001
From: Trevor Gross
Date: Fri, 11 Aug 2023 22:16:01 -0400
Subject: [PATCH 1/4] [IR] Add an xpassing test for `f128` intrinsic lowering
`f12
tgross35 wrote:
@efriedma-quic was looking at this on phabricator
https://github.com/llvm/llvm-project/pull/76558
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https://github.com/tgross35 created
https://github.com/llvm/llvm-project/pull/76558
Currently `fp128` math intrinsics are lowered to functions expecting `long
double`, which is a problem when `long double` and `f128` do not have the same
layout (e.g. `long double` on x86 is `f80`).
This patch
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