[clang] [llvm] [NVPTX] Add intrinsics for cvt .f6x2 and .ue8m0x2 variants (PR #134345)

2025-04-03 Thread Srinivasa Ravi via cfe-commits
https://github.com/Wolfram70 created https://github.com/llvm/llvm-project/pull/134345 This change adds NVVM intrinsics and clang builtins for the cvt instruction variants of types `.e2m3x2`, `.e3m2x2`, and `.ue8m0x2` introduced in PTX 8.6 for `sm_100a`, `sm_101a`, and `sm_120a`. Tests are add

[clang] [llvm] [NVPTX] Add intrinsics for redux.sync f32 instructions (PR #126664)

2025-02-11 Thread Srinivasa Ravi via cfe-commits
https://github.com/Wolfram70 updated https://github.com/llvm/llvm-project/pull/126664 >From 88e076bb9af3b1bc63d76feef1ba842d88fbd95f Mon Sep 17 00:00:00 2001 From: Srinivasa Ravi Date: Mon, 10 Feb 2025 14:13:42 +0530 Subject: [PATCH] [NVPTX] Add intrinsics for redux.sync f32 instructions Adds

[clang] [llvm] [NVPTX] Add intrinsics for redux.sync f32 instructions (PR #126664)

2025-02-11 Thread Srinivasa Ravi via cfe-commits
https://github.com/Wolfram70 updated https://github.com/llvm/llvm-project/pull/126664 >From 062a48e73ea1434f3c00ab3c0e717db66aa0f15e Mon Sep 17 00:00:00 2001 From: Srinivasa Ravi Date: Mon, 10 Feb 2025 14:13:42 +0530 Subject: [PATCH] [NVPTX] Add intrinsics for redux.sync f32 instructions Adds