https://github.com/ostannard approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/llvm/llvm-project/pull/121943
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https://github.com/ostannard approved this pull request.
LGTM, thanks.
https://github.com/llvm/llvm-project/pull/123827
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@@ -7858,20 +7858,19 @@ bool
AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
Optionality);
return true;
}
-if (HasActiveSubsection &&
-(SubsectionName == ActiveSubsection->VendorName)) {
- if (IsOptional != ActiveSubs
@@ -7846,6 +7839,13 @@ bool
AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
return true;
}
+ bool SubsectionExists = true;
ostannard wrote:
You don't need this extra `bool`, you can just check `if (ExistingSubsection)`
below.
https:
@@ -182,6 +182,16 @@ AArch64TargetStreamer::getActiveAtributesSubsection() {
return nullptr;
}
+std::unique_ptr
+AArch64TargetStreamer::getActiveSubsectionByName(StringRef name) {
ostannard wrote:
This name is misleading, because this function doesn't check
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/123336
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Ping
https://github.com/llvm/llvm-project/pull/121943
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https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/5] [AArch64] refactor optional v9.x features inherited from
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/4] [AArch64] refactor optional v9.x features inherited from
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/3] [AArch64] refactor optional v9.x features inherited from
ostannard wrote:
This is a system register only feature, but not one which we have enabled
unconditionally. If we're going to turn it on only for architectures/CPUs which
(can) have it, then I think it's better to be precise, which is what this patch
does. Since it's only a system register we
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/123336
The FEAT_SPEv1p2 feature (known to LLVM as FeatureSPE_EEF and +spe-eef) was
incorrectly marked as a required feature of Armv8.7-A (and later), which is
incorrect because it is optional, and some CPUs do not i
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,151 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -148,13 +150,151 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,123 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/121943
>From 2a69ca9ba3b67967e0f88a9b96ac8bea44220842 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 19 Dec 2024 09:12:19 +
Subject: [PATCH 1/3] [Clang] Re-write codegen for atomic_test_and_set and
at
@@ -3686,12 +3687,18 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
C11CmpXchg,
// bool __atomic_compare_exchange(A *, C *, CP, bool, int, int)
-GNUCmpXchg
+GNUCmpXchg,
+
+// bool __atomic_test_and_set(A *, int)
+Test
@@ -1977,16 +1977,16 @@ def AtomicNandFetch : AtomicBuiltin {
let Prototype = "void(...)";
}
-def AtomicTestAndSet : Builtin {
+def AtomicTestAndSet : AtomicBuiltin {
let Spellings = ["__atomic_test_and_set"];
- let Attributes = [NoThrow];
- let Prototype = "bool(void v
@@ -3963,8 +3995,8 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
return ExprError();
}
- if (!IsC11 && !AtomTy.isTriviallyCopyableType(Context) &&
- !AtomTy->isScalarType()) {
+ if (!IsC11 && Form != TestAndSet && Form != Clear
@@ -284,11 +284,26 @@ void f(_Atomic(int) *i, const _Atomic(int) *ci,
const volatile int flag_k = 0;
volatile int flag = 0;
- (void)(int)__atomic_test_and_set(&flag_k, memory_order_seq_cst); //
expected-warning {{passing 'const volatile int *' to parameter of type
'vola
@@ -3911,14 +3926,31 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
}
}
- // Pointer to object of size zero is not allowed.
- if (RequireCompleteType(Ptr->getBeginLoc(), AtomTy,
- diag::err_incomplete_type))
@@ -0,0 +1,62 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
ostannard wrote:
The `not` only applies to the first command, so the `FileCheck` will run and
report errors as normal. There are plenty of existing tests which do this, for
example `te
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -0,0 +1,62 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, required, uleb128
+.aeabi_attribute Tag_Feature_BTI, 1
+// ERR: error: Unknown AArch64 build attribute 'T
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -151,3 +151,97 @@ llvm::createAArch64ObjectTargetStreamer(MCStreamer &S,
MCTargetStreamer *llvm::createAArch64NullTargetStreamer(MCStreamer &S) {
return new AArch64TargetStreamer(S);
}
+
+void AArch64TargetStreamer::emitAtributesSubsection(
+StringRef VendorName, AArch
@@ -54,6 +54,7 @@
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/ARMBuildAttributes.h"
ostannard wrote:
What are we using from `ARMBuildAttributes.h` in this file, and can it be moved
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -0,0 +1,88 @@
+//===-- AArch64BuildAttributes.h - AARch64 Build Attributes -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,80 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, optional, uleb128
+// ERR: error: aeabi_pauthabi must be marked as required
+// ERR-NEXT: .aeabi_subsecti
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,177 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,50 @@
+// RUN: llvm-mc -triple=aarch64 %s -o - | FileCheck %s --check-prefix=ASM
+// RUN: llvm-mc -triple=aarch64 -filetype=obj %s -o - | llvm-readelf
--hex-dump=.ARM.attributes - | FileCheck %s --check-prefix=ELF
+
+// ASM: .aeabi_subsection private_subsection_1,
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,177 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,80 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, optional, uleb128
+// ERR: error: aeabi_pauthabi must be marked as required
+// ERR-NEXT: .aeabi_subsecti
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
ostannard wrote:
Updated version: #121943
https://github.com/llvm/llvm-project/pull/120449
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/121943
Re-write the sema and codegen for the atomic_test_and_set and atomic_clear
builtin functions to go via AtomicExpr, like the other atomic builtins do. This
simplifies the code, because AtomicExpr already handl
ostannard wrote:
> Not added: Tests for attributes with NTBS values - currently all attributes
> takes only ULEB128 as values. In order to have attributes that takes NTBS
> values, new headers need to be defined.
The `.aeabi_subsection` directive should accept any subsection name, only
checki
ostannard wrote:
Thanks for the revert, I'm on holiday now so I'll have another go at fixing
this in the new year.
https://github.com/llvm/llvm-project/pull/120449
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@@ -793,20 +793,23 @@ void ARMTargetELFStreamer::switchVendor(StringRef Vendor)
{
void ARMTargetELFStreamer::emitAttribute(unsigned Attribute, unsigned Value) {
getStreamer().setAttributeItem(Attribute, Value,
- /* OverwriteExisting= */ true)
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/114217
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@@ -105,27 +107,55 @@ class MCELFStreamer : public MCObjectStreamer {
unsigned Tag;
unsigned IntValue;
std::string StringValue;
+AttributeItem(Types Ty, unsigned Tg, unsigned IV, std::string SV)
+: Type(Ty), Tag(Tg), IntValue(IV), StringValue(SV) {}
+ }
@@ -151,3 +151,81 @@ llvm::createAArch64ObjectTargetStreamer(MCStreamer &S,
MCTargetStreamer *llvm::createAArch64NullTargetStreamer(MCStreamer &S) {
return new AArch64TargetStreamer(S);
}
+
+void AArch64TargetStreamer::emitSubsection(
ostannard wrote:
The te
@@ -148,13 +151,133 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(unsigned VendorID, unsigned Tag, unsigned Value,
+ bool Override) overr
@@ -19,9 +19,74 @@
#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/TableGen/Record.h"
namespace llvm {
+class StringRef;
+
namespace ARMBuildAttrs {
+// AArch64 build attributes
--
@@ -783,6 +786,67 @@ void MCELFStreamer::createAttributesSection(
AttrsVec.clear();
}
+void MCELFStreamer::createAArch64AttributesSection(
ostannard wrote:
If this is AArch64 specific, it should be moved to one of the AArch64 classes,
probably `AArch64Targ
https://github.com/ostannard edited
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/ostannard commented:
It looks like this is still missing the ability to emit build attributes by
number, for future attributes the assembler does not know about.
There is also still a lot of new code here not covered by tests:
* Tests for pauthabi platform/version in codegen
@@ -0,0 +1,30 @@
+// Test AArch64 build attributes to assmebly: 'aeabi_feature_and_bits'
ostannard wrote:
These clang tests should be removed.
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/llvm/llvm-project/pull/120449
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https://github.com/llvm/llvm-project/pull/120449
>From 28174b0b54d36b070200d630bdeae64232264841 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 18 Dec 2024 15:46:02 +
Subject: [PATCH 1/5] Add test for current behaviour
---
clang/test/CodeGen/
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/120449
>From 28174b0b54d36b070200d630bdeae64232264841 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 18 Dec 2024 15:46:02 +
Subject: [PATCH 1/4] Add test for current behaviour
---
clang/test/CodeGen/
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/114218
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ostannard wrote:
> If __atomic_test_and_set is overloaded to have both a volatile and
> non-volatile variant, it should be using custom type-checking in Sema.
Looking at the code again, there's a separate system used to codegen most of
the atomic builtins, so I've switched to using that. That
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/120449
Re-write the sema and codegen for the atomic_test_and_set and atomic_clear
builtin functions to go via AtomicExpr, like the other atomic builtins do. This
simplifies the code, because AtomicExpr already handl
@@ -180,7 +180,7 @@ namespace {
bool HandleTopLevelDecl(DeclGroupRef DG) override {
// FIXME: Why not return false and abort parsing?
- if (Diags.hasErrorOccurred())
+ if (Diags.hasUnrecoverableErrorOccurred())
ostannard wrote:
I think thi
@@ -74,7 +74,7 @@ int test13(int *a) {
}
int test14(int *a, int b) {
- a = (int *)__builtin_assume_aligned(b, 32); // expected-error {{incompatible
integer to pointer conversion passing 'int' to parameter of type 'const void *}}
+ a = (int *)__builtin_assume_aligned(b, 32);
@@ -5272,8 +5272,11 @@ bool Sema::BuiltinAssumeAligned(CallExpr *TheCall) {
{
ExprResult FirstArgResult =
DefaultFunctionArrayLvalueConversion(FirstArg);
-if (checkBuiltinArgument(*this, TheCall, 0))
ostannard wrote:
Done
https://github.com/
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/114217
>From a657d11051c95473727ca5e9f6a8e8ab195fe590 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 30 Oct 2024 12:01:56 +
Subject: [PATCH 1/3] [Clang] Fix crash in __builtin_assume_aligned
The CodeG
ostannard wrote:
The code changes are all in llvm (not clang), so the tests need to be there
too, using `llvm-mc` and `llc` instead of `clang`.
I'd prefer to see the code for the assembly parser before reviewing this,
because that will probably affect the API design of the streamer, since it w
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/118811
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https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/118284
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/118811
This core was originally AArch64-only, but the r1p0 revision added optional
support for AArch32 at EL0.
TRM: https://developer.arm.com/documentation/101604/0103
>From 78abb36186afa3f46f596af201fe445a7b359fb5
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/118284
There were two bugs in the implementation of the MVE vsbciq (subtract with
carry across vector, with initial carry value) intrinsics:
* The VSBCI instruction behaves as if the carry-in is always set, but we we
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/116985
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https://github.com/llvm/llvm-project/pull/116985
This was implementing the bf16->float conversion function using a left-shift of
a signed integer, so for negative floating-point values a 1 was being shifted
into the sign bit of the signed integer intermedia
ostannard wrote:
I agree with the previous comments from @davemgreen and @smithp35, user-facing
diagnostics should always be emitted by clang, so that cases like LTO work
correctly. If you want to reduce the duplication of the code which works out
what ABIs are compatible (which I think would
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/116371
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https://github.com/llvm/llvm-project/pull/116371
>From 6bfe667f87da2551e7080af3caede272378e1e4d Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 14 Nov 2024 18:16:12 +
Subject: [PATCH 1/2] [ARM] Fix NaN behaviour for MVE compare intrinsics
The
@@ -118,6 +118,8 @@ def fcmp_gt: IRBuilder<"CreateFCmpOGT">;
def fcmp_ge: IRBuilder<"CreateFCmpOGE">;
def fcmp_lt: IRBuilder<"CreateFCmpOLT">;
def fcmp_le: IRBuilder<"CreateFCmpOLE">;
ostannard wrote:
Done
https://github.com/llvm/llvm-project/pull/116371
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/116371
The MVE intrinsics are defined as having the same behaviour as the instructions
which they correspond to. In particular, the vcmpleq and vcmpltq intrinsics
correspond to the VCMP instruction with the LE or LT
ostannard wrote:
The pre-commit CI failure is an unrelated LLDB test failure, so I'm ignoring it.
https://github.com/llvm/llvm-project/pull/115908
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https://github.com/llvm/llvm-project/pull/115908
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https://github.com/llvm/llvm-project/pull/115908
For most MVE predicated FMA instructions, disabled lanes will contain the value
in the addend operand. However, The VFMAS instruction takes the addend in a
GPR, and the output register is shared with the firs
https://github.com/ostannard approved this pull request.
https://github.com/llvm/llvm-project/pull/115296
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ostannard wrote:
Those two regressions turned out to be an existing bug, which previously only
triggered with `-Wno-int-conversion`. They should be fixed by #114217 and
#114218.
https://github.com/llvm/llvm-project/pull/84146
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https://github.com/llvm/llvm-project/pull/114218
If an integer is passed to the pointer argument of the __atomic_test_and_set or
__atomic_clear builtins with the int-conversion error disabled or downgraded,
we crashed in codegen due to assuming that the typ
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/114217
The CodeGen for __builtin_assume_aligned assumes that the first argument is a
pointer, so crashes if the int-conversion error is downgraded or disabled. Emit
a non-downgradable error if the argument is not a
ostannard wrote:
Merged:
376d7b27fa3d [ARM] Optimise byval arguments in tail-calls
914a3990d1a0 [ARM] Avoid clobbering byval arguments when passing to tail-calls
a96c14eeb8fc [Clang] Always forward sret parameters to musttail calls
78ec2e2ed5e3 [ARM] Allow tail calls with byval args
82e64721974b
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/109943
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Author: Kiran
Date: 2024-10-25T09:34:08+01:00
New Revision: a96c14eeb8fcb1a141c0f55ed5d28dd7f1f3e38e
URL:
https://github.com/llvm/llvm-project/commit/a96c14eeb8fcb1a141c0f55ed5d28dd7f1f3e38e
DIFF:
https://github.com/llvm/llvm-project/commit/a96c14eeb8fcb1a141c0f55ed5d28dd7f1f3e38e.diff
LOG: [C
ostannard wrote:
Ping
https://github.com/llvm/llvm-project/pull/109943
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https://github.com/ostannard approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/111235
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@@ -238,6 +236,7 @@ END_COMPILERRT_OUTLINE_FUNCTION(__arm_sc_memcpy)
DEFINE_COMPILERRT_FUNCTION_ALIAS(__arm_sc_memmove, __arm_sc_memcpy)
+#if defined(__aarch64__) && __ARM_FP != 0
ostannard wrote:
This could do with a comment explaining why only some are bui
@@ -1,5 +1,20 @@
#include
+#if __ARM_FP == 0
+// WARNING: When building the scalar versions of these functions you need to
+// use the compiler flag "-mllvm -disable-loop-idiom-all" to prevent clang
ostannard wrote:
I think `-fno-builtin-memcpy` would be a be
@@ -0,0 +1,345 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=armv7a-none-eabi %s -o - | FileCheck %s
+
+declare i32 @many_args_callee(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5)
+
+define i32 @many
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/109943
>From 9b2646806978429395232ed596429ef281bcb26b Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 9 May 2024 12:58:41 +0100
Subject: [PATCH 01/10] [ARM] Re-generate a test
---
llvm/test/CodeGen/ARM/fp
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/111352
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ostannard wrote:
Ping.
https://github.com/llvm/llvm-project/pull/109943
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/111352
This makes the test independent of the one provided by a toolchain clang is
built into, which can cause the output of
-print-multi-flags-experimental to change.
>From 453eefa2b9b28b3cddf5ceafdab4cdc723ef5a3c
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/110874
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/110874
Pass the -mabi option through to multilib, so that it can be used for library
selection.
>From d89ce145e529a6795291234c7d4b5c2cb5b75bc5 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 2 Oct 2024 16
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