ostannard wrote:
I'd assumed that this was a sufficiently uncommon edge-case that it wasn't
worth a release note, but I'll keep that in mind in future and add release
notes for things like this.
https://github.com/llvm/llvm-project/pull/126774
___
cf
ostannard wrote:
That looks like the expected consequence of this change:
* Previously, the anonymous bitfield was erroneously given a 64-bit container,
so it occupied 7 copies of the container type, starting at byte 8 of the struct
and ending at 64.
* Now, it is given a 128-bit container, as r
https://github.com/ostannard approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/137771
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https://github.com/llvm/llvm-project/pull/126774
>From 223eb6f3153bce087306f54c398034ff7a64c1d1 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Tue, 11 Feb 2025 17:40:55 +
Subject: [PATCH 1/4] Add tests showing bugs
---
clang/test/CodeGen/aapcs-al
ostannard wrote:
Ping
https://github.com/llvm/llvm-project/pull/127068
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Ping
https://github.com/llvm/llvm-project/pull/126774
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/126774
This fixes two bugs in the ABI for over-sized bitfields for ARM and AArch64:
The container type picked for an over-sized bitfield already contributes to the
alignment of the structure, but it should also cont
ostannard wrote:
/cherry-pick 97b066f4e92a0df46b9d10721e988210f0d1afb6
https://github.com/llvm/llvm-project/pull/124762
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https://github.com/llvm/llvm-project/pull/124762
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ostannard wrote:
/cherry-pick 97b066f4e92a0df46b9d10721e988210f0d1afb6
https://github.com/llvm/llvm-project/pull/124762
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ostannard wrote:
The release notes have now been cleared on main, so I'll re-add them in the
llvm-20 cherry pick.
https://github.com/llvm/llvm-project/pull/124762
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https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/124762
>From 4d883f068c5061e60e90e51d149a361920b431d2 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 12 Dec 2024 15:29:31 +
Subject: [PATCH 1/7] [ARM] Empty structs are 1-byte for C++ ABI
For C++ (but
https://github.com/ostannard edited
https://github.com/llvm/llvm-project/pull/124935
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@@ -1013,3 +1013,41 @@
// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E
-dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
// CHECK-MVE3: #define __ARM_FEATURE_MVE 3
+
+// Cortex-R52 and Cortex-R52Plus
https://github.com/ostannard approved this pull request.
LGTM with one change to the tests, no need for re-review.
https://github.com/llvm/llvm-project/pull/124935
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@@ -1013,3 +1013,19 @@
// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E
-dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
// CHECK-MVE3: #define __ARM_FEATURE_MVE 3
+
+// Cortex-R52 and Cortex-R52Plus
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/124762
>From 4d883f068c5061e60e90e51d149a361920b431d2 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 12 Dec 2024 15:29:31 +
Subject: [PATCH 1/7] [ARM] Empty structs are 1-byte for C++ ABI
For C++ (but
ostannard wrote:
That last commit message should have been "llvm-20", not 19.
https://github.com/llvm/llvm-project/pull/124762
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>From 4d883f068c5061e60e90e51d149a361920b431d2 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 12 Dec 2024 15:29:31 +
Subject: [PATCH 1/6] [ARM] Empty structs are 1-byte for C++ ABI
For C++ (but
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/124762
>From 4d883f068c5061e60e90e51d149a361920b431d2 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 12 Dec 2024 15:29:31 +
Subject: [PATCH 1/5] [ARM] Empty structs are 1-byte for C++ ABI
For C++ (but
@@ -752,10 +780,13 @@ RValue ARMABIInfo::EmitVAArg(CodeGenFunction &CGF,
Address VAListAddr,
CharUnits SlotSize = CharUnits::fromQuantity(4);
// Empty records are ignored for parameter passing purposes.
- if (isEmptyRecord(getContext(), Ty, true))
+ uint64_t Size = getC
@@ -588,7 +615,8 @@ ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy,
bool isVariadic,
// Otherwise this is an AAPCS variant.
- if (isEmptyRecord(getContext(), RetTy, true))
+ if (isEmptyRecord(getContext(), RetTy, true) ||
+ getContext().getTypeSize(RetTy)
@@ -366,9 +387,15 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty,
bool isVariadic,
return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
}
- // Ignore empty records.
- if (isEmptyRecord(getContext(), Ty, true))
-return ABIArgInfo::ge
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/124760
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ostannard wrote:
I agree with @efriedma-quic that this is a very artificial test case, and I
wouldn't expect anyone to hit this in reality (I only noticed it while copying
the test for #124762), so it's not worth release-noting or adding a
compatibility option.
https://github.com/llvm/llvm-pr
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/124806
>From 2a1fb2ed2a91cf0a3da2c24b7e4c68fd5fc81751 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Tue, 28 Jan 2025 17:49:42 +
Subject: [PATCH] [ARM] Forbid use of TLS with execute-only
Thread-local code
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/124806
Thread-local code generation requires constant pools because most of the
relocations needed for it operate on data, so it cannot be used with
-mexecute-only (or -mpure-code, which is aliased in the driver).
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/124762
For C++ (but not C), empty structs should be passed to functions as if they are
a 1 byte object with 1 byte alignment.
This is defined in Arm's CPPABI32:
https://github.com/ARM-software/abi-aa/blob/main/cpp
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/124760
We had a test claiming that this empty struct type consumes a register slot
when passing it to a function with GCC, but that does not appear to be the
case, at least with GCC versions going back to 4.8.
This
https://github.com/ostannard approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/ostannard approved this pull request.
LGTM, thanks.
https://github.com/llvm/llvm-project/pull/123827
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@@ -7858,20 +7858,19 @@ bool
AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
Optionality);
return true;
}
-if (HasActiveSubsection &&
-(SubsectionName == ActiveSubsection->VendorName)) {
- if (IsOptional != ActiveSubs
@@ -7846,6 +7839,13 @@ bool
AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
return true;
}
+ bool SubsectionExists = true;
ostannard wrote:
You don't need this extra `bool`, you can just check `if (ExistingSubsection)`
below.
https:
@@ -182,6 +182,16 @@ AArch64TargetStreamer::getActiveAtributesSubsection() {
return nullptr;
}
+std::unique_ptr
+AArch64TargetStreamer::getActiveSubsectionByName(StringRef name) {
ostannard wrote:
This name is misleading, because this function doesn't check
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/123336
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Ping
https://github.com/llvm/llvm-project/pull/121943
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https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/5] [AArch64] refactor optional v9.x features inherited from
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/4] [AArch64] refactor optional v9.x features inherited from
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/123336
>From 8f958b7099d9c6999731b7ce0305fcfbe4705940 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Fri, 17 Jan 2025 12:08:38 +
Subject: [PATCH 1/3] [AArch64] refactor optional v9.x features inherited from
ostannard wrote:
This is a system register only feature, but not one which we have enabled
unconditionally. If we're going to turn it on only for architectures/CPUs which
(can) have it, then I think it's better to be precise, which is what this patch
does. Since it's only a system register we
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/123336
The FEAT_SPEv1p2 feature (known to LLVM as FeatureSPE_EEF and +spe-eef) was
incorrectly marked as a required feature of Armv8.7-A (and later), which is
incorrect because it is optional, and some CPUs do not i
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,151 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -148,13 +150,151 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,123 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -7806,6 +7815,267 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/121943
>From 2a69ca9ba3b67967e0f88a9b96ac8bea44220842 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Thu, 19 Dec 2024 09:12:19 +
Subject: [PATCH 1/3] [Clang] Re-write codegen for atomic_test_and_set and
at
@@ -3686,12 +3687,18 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
C11CmpXchg,
// bool __atomic_compare_exchange(A *, C *, CP, bool, int, int)
-GNUCmpXchg
+GNUCmpXchg,
+
+// bool __atomic_test_and_set(A *, int)
+Test
@@ -1977,16 +1977,16 @@ def AtomicNandFetch : AtomicBuiltin {
let Prototype = "void(...)";
}
-def AtomicTestAndSet : Builtin {
+def AtomicTestAndSet : AtomicBuiltin {
let Spellings = ["__atomic_test_and_set"];
- let Attributes = [NoThrow];
- let Prototype = "bool(void v
@@ -3963,8 +3995,8 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
return ExprError();
}
- if (!IsC11 && !AtomTy.isTriviallyCopyableType(Context) &&
- !AtomTy->isScalarType()) {
+ if (!IsC11 && Form != TestAndSet && Form != Clear
@@ -284,11 +284,26 @@ void f(_Atomic(int) *i, const _Atomic(int) *ci,
const volatile int flag_k = 0;
volatile int flag = 0;
- (void)(int)__atomic_test_and_set(&flag_k, memory_order_seq_cst); //
expected-warning {{passing 'const volatile int *' to parameter of type
'vola
@@ -3911,14 +3926,31 @@ ExprResult Sema::BuildAtomicExpr(SourceRange CallRange,
SourceRange ExprRange,
}
}
- // Pointer to object of size zero is not allowed.
- if (RequireCompleteType(Ptr->getBeginLoc(), AtomTy,
- diag::err_incomplete_type))
@@ -0,0 +1,62 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
ostannard wrote:
The `not` only applies to the first command, so the `FileCheck` will run and
report errors as normal. There are plenty of existing tests which do this, for
example `te
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -0,0 +1,62 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, required, uleb128
+.aeabi_attribute Tag_Feature_BTI, 1
+// ERR: error: Unknown AArch64 build attribute 'T
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -151,3 +151,97 @@ llvm::createAArch64ObjectTargetStreamer(MCStreamer &S,
MCTargetStreamer *llvm::createAArch64NullTargetStreamer(MCStreamer &S) {
return new AArch64TargetStreamer(S);
}
+
+void AArch64TargetStreamer::emitAtributesSubsection(
+StringRef VendorName, AArch
@@ -54,6 +54,7 @@
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/ARMBuildAttributes.h"
ostannard wrote:
What are we using from `ARMBuildAttributes.h` in this file, and can it be moved
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -0,0 +1,88 @@
+//===-- AArch64BuildAttributes.h - AARch64 Build Attributes -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,80 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, optional, uleb128
+// ERR: error: aeabi_pauthabi must be marked as required
+// ERR-NEXT: .aeabi_subsecti
@@ -0,0 +1,140 @@
+//===-- AArch64BuildAttributes.cpp - AArch64 Build Attributes
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,177 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,50 @@
+// RUN: llvm-mc -triple=aarch64 %s -o - | FileCheck %s --check-prefix=ASM
+// RUN: llvm-mc -triple=aarch64 -filetype=obj %s -o - | llvm-readelf
--hex-dump=.ARM.attributes - | FileCheck %s --check-prefix=ELF
+
+// ASM: .aeabi_subsection private_subsection_1,
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
@@ -148,13 +150,177 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(StringRef VendorName, unsigned Tag, unsigned Value,
+ std::string Strin
@@ -0,0 +1,80 @@
+// RUN: not llvm-mc -triple=aarch64 %s -o %t > %t.out 2>&1
+// RUN: FileCheck --input-file=%t.out --check-prefix=ERR %s
+
+.aeabi_subsection aeabi_pauthabi, optional, uleb128
+// ERR: error: aeabi_pauthabi must be marked as required
+// ERR-NEXT: .aeabi_subsecti
@@ -7806,6 +7815,261 @@ bool
AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
return false;
}
+bool AArch64AsmParser::parseDirectiveAeabiSubSectionHeader(SMLoc L) {
+ // Expecting 3 AsmToken::Identifier after '.aeabi_subsection', a name and 2
+ // param
ostannard wrote:
Updated version: #121943
https://github.com/llvm/llvm-project/pull/120449
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https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/121943
Re-write the sema and codegen for the atomic_test_and_set and atomic_clear
builtin functions to go via AtomicExpr, like the other atomic builtins do. This
simplifies the code, because AtomicExpr already handl
ostannard wrote:
> Not added: Tests for attributes with NTBS values - currently all attributes
> takes only ULEB128 as values. In order to have attributes that takes NTBS
> values, new headers need to be defined.
The `.aeabi_subsection` directive should accept any subsection name, only
checki
ostannard wrote:
Thanks for the revert, I'm on holiday now so I'll have another go at fixing
this in the new year.
https://github.com/llvm/llvm-project/pull/120449
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@@ -793,20 +793,23 @@ void ARMTargetELFStreamer::switchVendor(StringRef Vendor)
{
void ARMTargetELFStreamer::emitAttribute(unsigned Attribute, unsigned Value) {
getStreamer().setAttributeItem(Attribute, Value,
- /* OverwriteExisting= */ true)
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/114217
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@@ -105,27 +107,55 @@ class MCELFStreamer : public MCObjectStreamer {
unsigned Tag;
unsigned IntValue;
std::string StringValue;
+AttributeItem(Types Ty, unsigned Tg, unsigned IV, std::string SV)
+: Type(Ty), Tag(Tg), IntValue(IV), StringValue(SV) {}
+ }
@@ -151,3 +151,81 @@ llvm::createAArch64ObjectTargetStreamer(MCStreamer &S,
MCTargetStreamer *llvm::createAArch64NullTargetStreamer(MCStreamer &S) {
return new AArch64TargetStreamer(S);
}
+
+void AArch64TargetStreamer::emitSubsection(
ostannard wrote:
The te
@@ -148,13 +151,133 @@ class AArch64TargetAsmStreamer : public
AArch64TargetStreamer {
OS << "\t.seh_save_any_reg_px\tq" << Reg << ", " << Offset << "\n";
}
+ void emitAttribute(unsigned VendorID, unsigned Tag, unsigned Value,
+ bool Override) overr
@@ -19,9 +19,74 @@
#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/TableGen/Record.h"
namespace llvm {
+class StringRef;
+
namespace ARMBuildAttrs {
+// AArch64 build attributes
--
@@ -783,6 +786,67 @@ void MCELFStreamer::createAttributesSection(
AttrsVec.clear();
}
+void MCELFStreamer::createAArch64AttributesSection(
ostannard wrote:
If this is AArch64 specific, it should be moved to one of the AArch64 classes,
probably `AArch64Targ
https://github.com/ostannard edited
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/ostannard commented:
It looks like this is still missing the ability to emit build attributes by
number, for future attributes the assembler does not know about.
There is also still a lot of new code here not covered by tests:
* Tests for pauthabi platform/version in codegen
@@ -0,0 +1,30 @@
+// Test AArch64 build attributes to assmebly: 'aeabi_feature_and_bits'
ostannard wrote:
These clang tests should be removed.
https://github.com/llvm/llvm-project/pull/118771
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https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/120449
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https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/120449
>From 28174b0b54d36b070200d630bdeae64232264841 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 18 Dec 2024 15:46:02 +
Subject: [PATCH 1/5] Add test for current behaviour
---
clang/test/CodeGen/
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/120449
>From 28174b0b54d36b070200d630bdeae64232264841 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 18 Dec 2024 15:46:02 +
Subject: [PATCH 1/4] Add test for current behaviour
---
clang/test/CodeGen/
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/114218
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ostannard wrote:
> If __atomic_test_and_set is overloaded to have both a volatile and
> non-volatile variant, it should be using custom type-checking in Sema.
Looking at the code again, there's a separate system used to codegen most of
the atomic builtins, so I've switched to using that. That
https://github.com/ostannard created
https://github.com/llvm/llvm-project/pull/120449
Re-write the sema and codegen for the atomic_test_and_set and atomic_clear
builtin functions to go via AtomicExpr, like the other atomic builtins do. This
simplifies the code, because AtomicExpr already handl
@@ -180,7 +180,7 @@ namespace {
bool HandleTopLevelDecl(DeclGroupRef DG) override {
// FIXME: Why not return false and abort parsing?
- if (Diags.hasErrorOccurred())
+ if (Diags.hasUnrecoverableErrorOccurred())
ostannard wrote:
I think thi
@@ -74,7 +74,7 @@ int test13(int *a) {
}
int test14(int *a, int b) {
- a = (int *)__builtin_assume_aligned(b, 32); // expected-error {{incompatible
integer to pointer conversion passing 'int' to parameter of type 'const void *}}
+ a = (int *)__builtin_assume_aligned(b, 32);
@@ -5272,8 +5272,11 @@ bool Sema::BuiltinAssumeAligned(CallExpr *TheCall) {
{
ExprResult FirstArgResult =
DefaultFunctionArrayLvalueConversion(FirstArg);
-if (checkBuiltinArgument(*this, TheCall, 0))
ostannard wrote:
Done
https://github.com/
https://github.com/ostannard updated
https://github.com/llvm/llvm-project/pull/114217
>From a657d11051c95473727ca5e9f6a8e8ab195fe590 Mon Sep 17 00:00:00 2001
From: Oliver Stannard
Date: Wed, 30 Oct 2024 12:01:56 +
Subject: [PATCH 1/3] [Clang] Fix crash in __builtin_assume_aligned
The CodeG
ostannard wrote:
The code changes are all in llvm (not clang), so the tests need to be there
too, using `llvm-mc` and `llc` instead of `clang`.
I'd prefer to see the code for the assembly parser before reviewing this,
because that will probably affect the API design of the streamer, since it w
https://github.com/ostannard closed
https://github.com/llvm/llvm-project/pull/118811
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