[PATCH] D158252: Fix regression of D157680

Matt added inline comments. Comment at: llvm/test/CodeGen/X86/x86-prefer-no-gather-no-scatter.ll:3 +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2,+fast-gather %s -o - | FileCheck %s --check-prefixes=GATHER +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2,+

[PATCH] D134352: [AArch64] Add Neoverse V2 CPU support

Matt added a comment. OK, thanks! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134352/new/ https://reviews.llvm.org/D134352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D134352: [AArch64] Add Neoverse V2 CPU support

Matt added inline comments. Comment at: llvm/include/llvm/Support/AArch64TargetParser.def:239 +AARCH64_CPU_NAME("neoverse-v2", ARMV9A, FK_NEON_FP_ARMV8, false, + (AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SSBS | + AArch64::AEK_FP16 | AAr

[PATCH] D134352: [AArch64] Add Neoverse V2 CPU support

Matt added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64.td:1112 + FeatureNEON, FeatureSVE2BitPerm, FeatureFP16FML, + FeatureMTE, FeatureRandGen]; list Saphira= [HasV8_4aOps, Featur

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

Matt added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:1832 + else { +assert(!Val.getAsInteger(10, Bits)); +CmdArgs.push_back( There may be a way to avoid side-effects in assertions (`getAsInteger` changing the value o

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

Matt added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp:161 EnableBranchTargets("aarch64-enable-branch-targets", cl::Hidden, cl::desc("Enable the AAcrh64 branch target pass"), cl::init(true));