@@ -816,12 +816,12 @@ kernel void test_target_features_kernel(global int *i) {
// NOCPU: attributes #[[ATTR10]] = { convergent nounwind }
//.
// GFX900: attributes #[[ATTR0:[0-9]+]] = { "objc_arc_inert" }
-// GFX900: attributes #[[ATTR1]] = { convergent norecurse nounwind
"den
@@ -1,6 +0,0 @@
-// RUN: %clang_cc1 -triple amdgcn -target-feature +gws -o /dev/null %s 2>&1 \
-// RUN: | FileCheck --check-prefix=GWS %s
-
-// GWS: warning: feature flag '+gws' is ignored since the feature is read only
[-Winvalid-command-line-argument]
arsenm
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https://github.com/llvm/llvm-project/pull/147759
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I thought this was enabled a long time ago?
https://github.com/llvm/llvm-project/pull/147541
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@@ -451,6 +451,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final :
public TargetInfo {
CUMode = false;
else if (F == "+image-insts")
HasImage = true;
+ else if (F == "+gfx950-insts" || F == "+gfx1250-insts")
+HasFullBFloat16 = true;
-
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lgtm with test nits
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@@ -0,0 +1,15 @@
+// Test for the Triple constructor ambiguity fix on AIX
+// This test verifies that the default target triple is correctly resolved
+// and doesn't fall back to "unknown" due to constructor ambiguity.
+
+// REQUIRES: system-aix
+// RUN: %clang -v %s -c 2>&1 | Fil
@@ -0,0 +1,15 @@
+// Test for the Triple constructor ambiguity fix on AIX
+// This test verifies that the default target triple is correctly resolved
+// and doesn't fall back to "unknown" due to constructor ambiguity.
+
+// REQUIRES: system-aix
+// RUN: %clang -v %s -c 2>&1 | Fil
@@ -13658,6 +13658,7 @@ bool SITargetLowering::isCanonicalized(Register Reg,
const MachineFunction &MF,
case Intrinsic::amdgcn_frexp_mant:
case Intrinsic::amdgcn_fdot2:
case Intrinsic::amdgcn_trig_preop:
+case Intrinsic::amdgcn_tanh:
arsenm wro
@@ -0,0 +1,22 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -700,7 +700,8 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
break;
}
case Intrinsic::amdgcn_sqrt:
- case Intrinsic::amdgcn_rsq: {
+ case Intrinsic::amdgcn_rsq:
+ case Intrinsic::amdgcn_tanh: {
arsenm wrote:
Thi
@@ -13658,6 +13658,7 @@ bool SITargetLowering::isCanonicalized(Register Reg,
const MachineFunction &MF,
case Intrinsic::amdgcn_frexp_mant:
case Intrinsic::amdgcn_fdot2:
case Intrinsic::amdgcn_trig_preop:
+case Intrinsic::amdgcn_tanh:
arsenm wro
@@ -0,0 +1,22 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -0,0 +1,22 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -0,0 +1,32 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Excep
https://github.com/arsenm commented:
This is still doing the target intrinsic instead of handling ptrmask first?
https://github.com/llvm/llvm-project/pull/145278
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@@ -215,6 +215,9 @@ void addOpenMPDeviceRTL(const Driver &D, const
llvm::opt::ArgList &DriverArgs,
StringRef BitcodeSuffix, const llvm::Triple &Triple,
const ToolChain &HostTC);
+void addOpenCLBuiltinsLib(const Driver &D, const
@@ -2942,6 +2942,65 @@ void tools::addHIPRuntimeLibArgs(const ToolChain &TC,
Compilation &C,
}
}
+void tools::addOpenCLBuiltinsLib(const Driver &D,
+ const llvm::opt::ArgList &DriverArgs,
+ llvm::opt::ArgString
@@ -2942,6 +2942,65 @@ void tools::addHIPRuntimeLibArgs(const ToolChain &TC,
Compilation &C,
}
}
+void tools::addOpenCLBuiltinsLib(const Driver &D,
+ const llvm::opt::ArgList &DriverArgs,
+ llvm::opt::ArgString
@@ -2942,6 +2942,65 @@ void tools::addHIPRuntimeLibArgs(const ToolChain &TC,
Compilation &C,
}
}
+void tools::addOpenCLBuiltinsLib(const Driver &D,
+ const llvm::opt::ArgList &DriverArgs,
+ llvm::opt::ArgString
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/147203
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Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?=
Message-ID:
In-Reply-To:
https://github.com/arsenm approv
arsenm wrote:
> This broke building C++ modules for mingw targets. Repro:
>
> `empty.cppm`:
>
> ```c++
> export module empty;
> ```
>
> ```
> $ clang -target x86_64-windows-gnu -x c++-module empty.cppm -c -o
> empty.cppm.obj -std=gnu++23
> error: invalid value 'seh' in '-exception-model=seh'
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https://github.com/llvm/llvm-project/pull/146643
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arsenm wrote:
* **#146643** https://app.graphite.dev/github/pr/llvm/llvm-project/146643?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/14664
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/146643
Fixes regression reported
https://github.com/llvm/llvm-project/pull/146342#issuecomment-3026600152
The test could probably be better. I'm not sure what special is happening with
the module
compile, but I can't
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=wasm32-unknown-unknown -wasm-use-legacy-eh
-exception-model=wasm -mattr=+exception-handling -run-pass wasm-cfg-stackify %s
-o - | FileCheck %s
+# RUN: llc -mtriple=wasm32-unknown-unknown -wasm-use-legacy-eh
-wasm-enable-sjlj -exception-model
@@ -4280,6 +4281,20 @@ bool AMDGPUAsmParser::validateMIMGD16(const MCInst
&Inst) {
return true;
}
+bool AMDGPUAsmParser::validateTensorR128(const MCInst &Inst) {
+ const unsigned Opc = Inst.getOpcode();
+ const MCInstrDesc &Desc = MII.get(Opc);
+
+ if ((Desc.TSFlags & SI
@@ -621,6 +621,32 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
llvm::Function *F = CGM.getIntrinsic(IID, {LoadTy});
return Builder.CreateCall(F, {Addr});
}
+ case AMDGPU::BI__builtin_amdgcn_tensor_load_to_lds:
+ case AMDGPU::BI__builtin_amdg
https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/146636
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https://github.com/arsenm commented:
Fix clang-format error
https://github.com/llvm/llvm-project/pull/146636
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https://github.com/llvm/llvm-project/pull/146634
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arsenm wrote:
* **#146634** https://app.graphite.dev/github/pr/llvm/llvm-project/146634?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/14663
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/146634
This was enforcing some rules about the combinations of flags at a random
point in the IR pass pipeline configuration. This is a module property that
should be handled at TargetMachine construction time at the lat
arsenm wrote:
> And it was a little confusing that the PR description argues we should remove
> `-wasm-enable-eh/sjlj` options, which disagree, when the code seems to fix
> something else. Those flags control behaviors, not exception models, so we
> still need them. For example, someone might
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=wasm32-unknown-unknown -wasm-use-legacy-eh
-exception-model=wasm -mattr=+exception-handling -run-pass wasm-cfg-stackify %s
-o - | FileCheck %s
+# RUN: llc -mtriple=wasm32-unknown-unknown -wasm-use-legacy-eh
-wasm-enable-sjlj -exception-model
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/146623
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@@ -635,5 +635,66 @@ TARGET_BUILTIN(__builtin_amdgcn_bitop3_b16, "IUi",
"nc", "bitop3-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf16_f32, "V2yV2yfUiIb", "nc",
"f32-to-f16bf16-cvt-sr-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_f16_f32, "V2hV2hfUiIb", "nc",
"f32-to-
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@@ -0,0 +1,132 @@
+// RUN: %clang_cc1 -triple amdgcn-- -target-cpu gfx90a -S -verify=expected -o
- %s
arsenm wrote:
Needs another semi test for the rejected target case
https://github.com/llvm/llvm-project/pull/140210
__
@@ -635,5 +635,66 @@ TARGET_BUILTIN(__builtin_amdgcn_bitop3_b16, "IUi",
"nc", "bitop3-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf16_f32, "V2yV2yfUiIb", "nc",
"f32-to-f16bf16-cvt-sr-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_f16_f32, "V2hV2hfUiIb", "nc",
"f32-to-
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https://github.com/arsenm commented:
Title mentions type inferring but nothing is type inferring about these
https://github.com/llvm/llvm-project/pull/140210
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@@ -3679,6 +3679,22 @@ static StringRef GetInputKindName(InputKind IK) {
llvm_unreachable("unknown input language");
}
+static StringRef getExceptionHandlingName(unsigned EHK) {
+ switch (static_cast(EHK)) {
+ case LangOptions::ExceptionHandlingKind::None:
+ default:
+
@@ -3694,6 +3710,10 @@ void CompilerInvocationBase::GenerateLangArgs(const
LangOptions &Opts,
GenerateArg(Consumer, OPT_pic_is_pie);
for (StringRef Sanitizer : serializeSanitizerKinds(Opts.Sanitize))
GenerateArg(Consumer, OPT_fsanitize_EQ, Sanitizer);
+if (
@@ -4002,6 +4022,24 @@ bool CompilerInvocation::ParseLangArgs(LangOptions
&Opts, ArgList &Args,
parseSanitizerKinds("-fsanitize=", Args.getAllArgValues(OPT_fsanitize_EQ),
Diags, Opts.Sanitize);
+if (const Arg *A = Args.getLastArg(options::OPT_e
https://github.com/arsenm ready_for_review
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arsenm wrote:
* **#146343** https://app.graphite.dev/github/pr/llvm/llvm-project/146343?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/>
* **#146342** https://app.graphite.dev/github/pr/llvm/llvm-p
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/146342
This will enable removal of a hack from the wasm backend
in a future change.
This feels unnecessarily clunky. I would assume something was
automatically parsing this and propagating it in the C++ case,
but I can'
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/146302
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arsenm wrote:
> > > Co-authored-by: Shilei Tian
> > > [i...@tianshilei.me](mailto:i...@tianshilei.me)
> >
> >
> > Co authored by yourself?
>
> Yes, because if you check the commit, the author is @rampitec.
After merging on GitHub, the PR author is listed as the author. You should swap
these
arsenm wrote:
> Co-authored-by: Shilei Tian [i...@tianshilei.me](mailto:i...@tianshilei.me)
Co authored by yourself?
https://github.com/llvm/llvm-project/pull/146302
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@@ -2660,6 +2644,122 @@ void X86AsmPrinter::emitCallInstruction(const
llvm::MCInst &MCI) {
OutStreamer->emitInstruction(MCI, getSubtargetInfo());
}
+// Checks whether a NOP is required after a CALL and inserts the NOP, if
+// necessary.
+void X86AsmPrinter::maybeEmitNopAfte
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/146293
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@@ -2660,6 +2644,122 @@ void X86AsmPrinter::emitCallInstruction(const
llvm::MCInst &MCI) {
OutStreamer->emitInstruction(MCI, getSubtargetInfo());
}
+// Checks whether a NOP is required after a CALL and inserts the NOP, if
+// necessary.
+void X86AsmPrinter::maybeEmitNopAfte
@@ -2519,6 +2519,29 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT,
AttributeList Attrs,
CheckFailed("invalid value for 'denormal-fp-math-f32' attribute: " + S,
V);
}
+
+ if (TT.isAMDGPU()) {
+if (auto A = Attrs.getFnAttr("amdgpu-waves-pe
@@ -0,0 +1,40 @@
+; RUN: not llvm-as -disable-output %s 2>&1 | FileCheck %s
+
+target triple = "amdgcn-amd-amdhsa"
+
+define void @valid_amdgpu_waves_per_eu_range() "amdgpu-waves-per-eu"="2,4" {
+ ret void
+}
arsenm wrote:
valid cases are tested in test/Assemble
@@ -0,0 +1,40 @@
+; RUN: not llvm-as -disable-output %s 2>&1 | FileCheck %s
+
+target triple = "amdgcn-amd-amdhsa"
+
+define void @valid_amdgpu_waves_per_eu_range() "amdgpu-waves-per-eu"="2,4" {
+ ret void
+}
+
+define void @valid_amdgpu_waves_per_eu_min_only() "amdgpu-waves-per-
@@ -2519,6 +2519,29 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT,
AttributeList Attrs,
CheckFailed("invalid value for 'denormal-fp-math-f32' attribute: " + S,
V);
}
+
+ if (TT.isAMDGPU()) {
+if (auto A = Attrs.getFnAttr("amdgpu-waves-pe
@@ -46,7 +46,6 @@ __attribute__((amdgpu_num_sgpr(4294967296))) kernel void
kernel_num_sgpr_L() {}
__attribute__((amdgpu_num_vgpr(4294967296))) kernel void kernel_num_vgpr_L()
{} // expected-error {{integer constant expression evaluates to value
4294967296 that cannot be repres
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@@ -349,7 +350,12 @@ class Triple {
/// triple fields unknown.
Triple() = default;
+ LLVM_ABI explicit Triple(std::string &&Str);
+ explicit Triple(StringRef Str) : Triple(Str.str()) {}
+ explicit Triple(const char *Str) : Triple(std::string(Str)) {}
+ explicit Triple(
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arsenm wrote:
* **#145685** https://app.graphite.dev/github/pr/llvm/llvm-project/145685?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/14568
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/145685
It turns out real Twine usage is scarce, and seems to only
be used from clang. Add a few overloads for the common cases,
and introduce a string&& case as the base case.
>From a0b41a898e9b220e1b2754967d88cdd667d64
@@ -0,0 +1,157 @@
+//===- AMDGPUExpandFeaturePredicates.cpp - Feature Predicate Expander Pass
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,157 @@
+//===- AMDGPUExpandFeaturePredicates.cpp - Feature Predicate Expander Pass
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=instcombine %s | FileCheck %s
+
+; Check that `select B, true, C` isn't optimized to `or B, C`,
+; because the inval
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arsenm wrote:
> Moving them into clc should resolve the concern, but I don't know where is
> destination directory in clc. I don't know how to map `opencl/lib/amdgcn` and
> `opencl/lib/r600` to `clc/lib/amdgcn` and `clc/lib/amdgpu`. Do you have
> suggestions about the mapping?
r600 and amdgcn
@@ -417,3 +417,15 @@ void HIPAMDToolChain::checkTargetID(
getDriver().Diag(clang::diag::err_drv_bad_target_id)
<< *PTID.OptionalTargetID;
}
+
+SPIRVAMDToolChain::SPIRVAMDToolChain(const Driver &D,
+ const llvm::Triple &Triple,
+
arsenm wrote:
> `llvm.compiler.used` global uses AS(0) which makes SPIR-V unhappy, but with
> this global it's AS(4) which makes it happy. Either way, this should be fixed.
llvm.used and llvm.compiler.used should universally use addrspace(0) and SPIRV
should be fixed to not break on this
arsenm wrote:
> and that's why you want to have single element loads that get inserted into a
> vector and then perform sub-vector extracts on it?
We care about eliminate stack usage at any cost. Big load are always better,
even if not naturally aligned. When we do care about alignment, we onl
arsenm wrote:
> We do support unaligned access IIUC, and it is actually required by HSA ABI.
> CC @arsenm
Unaligned access has been supported since almost always. There's just a mode
control for it, you can disable it in the driver though
https://github.com/llvm/llvm-project/pull/133301
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Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
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Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
https://github.com/arsenm approved this pull request.
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arsenm wrote:
* **#142534** https://app.graphite.dev/github/pr/llvm/llvm-project/142534?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/14253
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/142534
None
>From ef0db5d83400a2d43a8706cbfb7374a91d68f72f Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 2 Jun 2025 16:58:10 +0200
Subject: [PATCH] clang: Fix wrong C++ marker in tablegen file
---
clang/in
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