[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

mgoudar wrote: > Lets wait another day or two, since someone may have additional comments. > Thanks @mgoudar! sure. thank you. https://github.com/llvm/llvm-project/pull/130587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm

[clang] [llvm] Reland [MIPS] Define SubTargetFeature for i6500 cpu (#132907) (PR #133366)

https://github.com/mgoudar created https://github.com/llvm/llvm-project/pull/133366 Relands #132907 with a fix in the testcase: clang/test/CodeGen/Mips/subtarget-feature-test.c enable this test for only mips64 target PR #130587 defined same SubTargetFeature for CPUs i6400 and i6500 which resul

[clang] [llvm] [MIPS] Define SubTargetFeature for i6500 cpu (PR #132907)

@@ -0,0 +1,6 @@ +// RUN: %clang --target=mips64-linux-gnu -mcpu=i6400 -o %t -c %s 2>&1 | FileCheck --allow-empty %s +// CHECK-NOT: {{.*}} is not a recognized feature for this target + mgoudar wrote: thank you for the review. I have removed extra line. https://g

[clang] [llvm] [MIPS] Define SubTargetFeature for i6500 cpu (PR #132907)

https://github.com/mgoudar updated https://github.com/llvm/llvm-project/pull/132907 >From 752aaecc52b78a86a36d84af4ca42d166bcdc28e Mon Sep 17 00:00:00 2001 From: Mallikarjuna Gouda Date: Tue, 25 Mar 2025 15:18:52 +0530 Subject: [PATCH 1/2] [MIPS] Define SubTargetFeature for i6500 cpu PR #13058

[clang] [llvm] [MIPS] Define SubTargetFeature for i6500 cpu (PR #132907)

https://github.com/mgoudar created https://github.com/llvm/llvm-project/pull/132907 PR #130587 defined same SubTargetFeature for CPUs i6400 and i6500 which resulted into following warning when -mcpu=i6500 was used: +i6500' is not a recognized feature for this target (ignoring feature) This PR

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

mgoudar wrote: thank you. https://github.com/llvm/llvm-project/pull/130587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

@@ -121,6 +121,30 @@ // MIPS-ARCH-P5600-N64: error: ABI 'n64' is not supported on CPU 'p5600' // // RUN: %clang --target=mips-linux-gnu -### -c %s \ +// RUN:-march=i6400 2>&1 \ +// RUN: | FileCheck -check-prefix=MIPS-ARCH-I6400 %s +// MIPS-ARCH-I6400: "-target-cpu" "i

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

https://github.com/mgoudar updated https://github.com/llvm/llvm-project/pull/130587 >From 4f9c5b5b844a61b760a3462994c7736542c14ca4 Mon Sep 17 00:00:00 2001 From: Mallikarjuna Gouda Date: Mon, 10 Mar 2025 15:42:39 +0530 Subject: [PATCH 1/5] [MIPS] Add MIPS i6400 and i6500 processors The i6400 a

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

@@ -43,7 +43,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo { Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6 }; - enum class CPU { P5600 }; + enum class CPU { P5600, I6400 }; mgoudar wrote: Thanks for quick review! yes. i6

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

@@ -238,13 +238,10 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", "MipsSubtarget::CPU::P5600", "The P5600 Processor", [FeatureMips32r5]>; +// I6500 is multicluster version of I6400. Both are based on s

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

https://github.com/mgoudar updated https://github.com/llvm/llvm-project/pull/130587 >From 4f9c5b5b844a61b760a3462994c7736542c14ca4 Mon Sep 17 00:00:00 2001 From: Mallikarjuna Gouda Date: Mon, 10 Mar 2025 15:42:39 +0530 Subject: [PATCH 1/4] [MIPS] Add MIPS i6400 and i6500 processors The i6400 a

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

https://github.com/mgoudar created https://github.com/llvm/llvm-project/pull/130587 The i6400 and i6500 are high performance multi-core microprocessors from MIPS that provide best in class power efficiency for use in system-on-chip (SoC) applications. i6400 and i6500 implements Release 6 of t

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

https://github.com/mgoudar updated https://github.com/llvm/llvm-project/pull/130587 >From 4f9c5b5b844a61b760a3462994c7736542c14ca4 Mon Sep 17 00:00:00 2001 From: Mallikarjuna Gouda Date: Mon, 10 Mar 2025 15:42:39 +0530 Subject: [PATCH 1/2] [MIPS] Add MIPS i6400 and i6500 processors The i6400 a

[clang] [llvm] [MIPS] Add MIPS i6400 and i6500 processors (PR #130587)

https://github.com/mgoudar edited https://github.com/llvm/llvm-project/pull/130587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits