https://github.com/SixWeining approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/127555
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@@ -19,13 +23,16 @@
// CHECK-NOT: "--build-id"
// CHECK: "--hash-style=both"
// CHECK: "-pie"
-// CHECK: "-dynamic-linker" "/lib/ld-musl-arm.so.1"
+// CHECK-ARM: "-dynamic-linker" "/lib/ld-musl-arm.so.1"
SixWeining wrote:
Does `ARM-A7-SOFT ` also need this che
SixWeining wrote:
> > Could you add some tests in ohos.c with the `--sysroot` option specified?
>
> Could I confirm what the test targeting the `--sysroot` option is for? Is it
> also intended to test the `page-size`?
I mean the purpose is to check whether clang driver passes correct options t
@@ -235,3 +235,24 @@
// CHECK-OHOS-PTHREAD-NOT: -lpthread
+// RUN: %clang -### --target=aarch64-linux-ohos %s 2>&1 | \
+// RUN: FileCheck --check-prefix=CHECK-MAXPAGESIZE-4KB %s
+// RUN: %clang -### --target=aarch64-none-linux-gnu %s 2>&1 | \
+// RUN: FileCheck --check-pr
SixWeining wrote:
Could you add some tests in ohos.c with the `--sysroot` option specified?
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@@ -235,3 +235,24 @@
// CHECK-OHOS-PTHREAD-NOT: -lpthread
+// RUN: %clang -### --target=aarch64-linux-ohos %s 2>&1 | \
+// RUN: FileCheck --check-prefix=CHECK-MAXPAGESIZE-4KB %s
+// RUN: %clang -### --target=aarch64-none-linux-gnu %s 2>&1 | \
+// RUN: FileCheck --check-pr
@@ -741,16 +741,28 @@ std::unique_ptr AllocateTarget(const
llvm::Triple &Triple,
case llvm::Triple::loongarch32:
switch (os) {
case llvm::Triple::Linux:
- return std::make_unique>(Triple,
- Opt
@@ -2458,7 +2458,8 @@ void
Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes(
static const char *const LoongArch64LibDirs[] = {"/lib64", "/lib"};
static const char *const LoongArch64Triples[] = {
- "loongarch64-linux-gnu", "loongarch64-unknown-linux-gnu"};
https://github.com/SixWeining commented:
I think you should add more tests like
`clang/test/Driver/loongarch-toolchain.c` and https://reviews.llvm.org/D55029.
https://github.com/llvm/llvm-project/pull/127555
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https://github.com/SixWeining commented:
LGTM for the LoongArch change. We'll see if @kpdev has any objections later.
https://github.com/llvm/llvm-project/pull/127555
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@@ -368,7 +370,12 @@ void OHOS::addExtraOpts(llvm::opt::ArgStringList &CmdArgs)
const {
CmdArgs.push_back("-z");
CmdArgs.push_back("relro");
CmdArgs.push_back("-z");
- CmdArgs.push_back("max-page-size=4096");
+ // LoongArch needs page size 16K
SixWeini
@@ -368,7 +370,12 @@ void OHOS::addExtraOpts(llvm::opt::ArgStringList &CmdArgs)
const {
CmdArgs.push_back("-z");
CmdArgs.push_back("relro");
CmdArgs.push_back("-z");
- CmdArgs.push_back("max-page-size=4096");
+ // LoongArch needs page size 16K
+ if (getArch() == llvm:
https://github.com/SixWeining approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/123682
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@@ -2135,12 +2135,12 @@ const StringMap sys::getHostCPUFeatures() {
Features["div32"] = cpucfg2 & (1U << 26); // CPUCFG.2.DIV32
Features["lam-bh"] = cpucfg2 & (1U << 27); // CPUCFG.2.LAM_BH
Features["lamcas"] = cpucfg2 & (1U << 28); // CPUCFG.2.LAMCAS
+ Features["scq
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https://github.com/llvm/llvm-project/pull/111488
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SixWeining wrote:
I prefer #123587 that defaults to relax disabled.
https://github.com/llvm/llvm-project/pull/111488
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SixWeining wrote:
Add `--verify-machineinstrs` option as the code calls lots of `BuildMI(...)`.
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@@ -2868,6 +2872,61 @@ int UnwindCursor::stepThroughSigReturn(Registers_riscv &) {
#endif // defined(_LIBUNWIND_CHECK_LINUX_SIGRETURN) &&
// defined(_LIBUNWIND_TARGET_RISCV)
+#if defined(_LIBUNWIND_CHECK_LINUX_SIGRETURN) &&
\
+defined(
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https://github.com/SixWeining commented:
Move loongarch code before riscv for an alphabetical order.
https://github.com/llvm/llvm-project/pull/123682
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https://github.com/SixWeining approved this pull request.
LGTM for the LoongArch changes.
https://github.com/llvm/llvm-project/pull/122515
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@@ -228,11 +228,8 @@ class LLVM_LIBRARY_VISIBILITY FreeBSDTargetInfo : public
OSTargetInfo {
case llvm::Triple::arm:
this->MCountName = "__mcount";
break;
-case llvm::Triple::riscv32:
SixWeining wrote:
Do you want to remove riscv32 either?
SixWeining wrote:
> Is there the possibility to set up a buildbot for this architecture?
There is a [buildbot](https://lab.llvm.org/staging/#/builders/20) for
loongarch, but it only run tests for clang and llvm-test-suite.
Do you mean adding a dedicate buildbot for the `offload` sub-project? I
https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/119191
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https://github.com/SixWeining approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/119191
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SixWeining wrote:
Seems that this change causes Segment Fault on multiple targets including
aarch64, loongarch64 and riscv64.
This is detected by a LoongArch
[buildbot](https://lab.llvm.org/staging/#/builders/20/builds/6282) and manually
checked on aarch64 and riscv64 QEMUs.
I wonder why aar
https://github.com/SixWeining approved this pull request.
LGTM for the LoongArch bits.
https://github.com/llvm/llvm-project/pull/118244
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@@ -240,7 +240,8 @@ def m_riscv_Features_Group : OptionGroup<"">,
def m_ve_Features_Group : OptionGroup<"">,
Group, DocName<"VE">;
def m_loongarch_Features_Group : OptionGroup<"">,
- Group, DocName<"LoongArch">;
+
@@ -240,7 +240,8 @@ def m_riscv_Features_Group : OptionGroup<"">,
def m_ve_Features_Group : OptionGroup<"">,
Group, DocName<"VE">;
def m_loongarch_Features_Group : OptionGroup<"">,
- Group, DocName<"LoongArch">;
+
https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/117108
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https://github.com/SixWeining approved this pull request.
LGTM for the LoongArch bits.
https://github.com/llvm/llvm-project/pull/117108
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@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114189
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SixWeining wrote:
Just pick one memory ordering is enough as this test is not sensitive to memory
ordering.
https://github.com/llvm/llvm-project/pull/114189
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@@ -807,6 +807,10 @@ def err_drv_loongarch_invalid_simd_option_combination :
Error<
"invalid option combination; LASX depends on LSX">;
def err_drv_loongarch_invalid_msimd_EQ : Error<
"invalid argument '%0' to -msimd=; must be one of: none, lsx, lasx">;
+// Support for oth
@@ -0,0 +1,13 @@
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64s %s
2>&1 | FileCheck --check-prefix=INVALID1 %s
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64f %s
2>&1 | FileCheck --check-prefix=INVALID2 %s
+! RUN: %flang -###
@@ -0,0 +1,13 @@
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64s %s
2>&1 | FileCheck --check-prefix=INVALID1 %s
SixWeining wrote:
Usually `###` is the last option.
```suggestion
! RUN: not %flang -c --target=loongarch64-unknown-linux -m
@@ -0,0 +1,79 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -5722,6 +5726,58 @@ bool
LoongArchTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
}
+void LoongArchTargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
SixWeining wrote:
Please add some comments for this func and add a test (ir -> ir
@@ -118,6 +118,12 @@ def FeatureLAM_BH
"Support amswap[_db].{b/h} and amadd[_db].{b/h}
instructions.">;
def HasLAM_BH : Predicate<"Subtarget->hasLAM_BH()">;
+// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
+def FeatureDiv3
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
https://github.com/SixWeining commented:
Please remove the changes of #117298.
https://github.com/llvm/llvm-project/pull/116764
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@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ const uint32_t cpucfg2 = 0x2, cpuc
@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ const uint32_t cpucfg2 = 0x2, cpuc
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@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ uint32_t cpucfg2 = 0x2, cpucfg3 =
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https://github.com/SixWeining approved this pull request.
LGTM except a nit.
https://github.com/llvm/llvm-project/pull/116762
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https://github.com/SixWeining approved this pull request.
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https://github.com/SixWeining approved this pull request.
LGTM. But we can also add this feature in `sys::getHostCPUFeatures` in this PR.
https://github.com/llvm/llvm-project/pull/116762
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@@ -100,99 +101,99 @@ define void @cmpxchg_i64_acquire_acquire(ptr %ptr, i64
%cmp, i64 %val) nounwind
}
define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind
{
SixWeining wrote:
This test doesn't have `LA64` check?
https://github.c
SixWeining wrote:
> the original test is from gcc
>
> ```c++
> int divw(long a, long b) {
> return (int)a / (int)b;
> }
>
> unsigned int divwu(long a, long b) {
> return (unsigned int)a / (unsigned int)b;
> }
>
> int modw(long a, long b) {
> return (int)a % (int)b;
> }
>
> unsigne
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -141,7 +141,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::BITREVERSE, MVT::i32, Custom);
setOperationAction(ISD::BSWAP, MVT::i32, Custom);
-setOperationAction({ISD::UDIV, ISD::UREM}, MVT::i32, Custom);
+
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+ld-seq-sa < %s | FileCheck %s
--check-prefix=LA64-LD-SE
SixWeining wrote:
The expectation is at least for this test:
```
define i32 @test(i32 %a, i32 %b) {
%c = udiv i32 %a, %b
ret i32 %c
}
```
### without this feature
```
addi.w $a1, $a1, 0
addi.w $a0, $a0, 0
div.wu $a0, $a0, $a1
ret
```
### with this feature
@@ -118,6 +118,12 @@ def FeatureLAM_BH
"Support amswap[_db].{b/h} and amadd[_db].{b/h}
instructions.">;
def HasLAM_BH : Predicate<"Subtarget->hasLAM_BH()">;
+// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
+def FeatureDiv3
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https://github.com/SixWeining approved this pull request.
LGTM. Tips: It's not necessary to use force-push to address review comments.
Add new commits and they will be squashed when merge.
https://github.com/llvm/llvm-project/pull/115832
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@@ -14,6 +14,7 @@
#include "clang/Driver/Options.h"
#include "llvm/TargetParser/Host.h"
#include "llvm/TargetParser/LoongArchTargetParser.h"
+#include
SixWeining wrote:
Is this header necessary?
https://github.com/llvm/llvm-project/pull/115832
__
@@ -135,10 +136,15 @@ void loongarch::getLoongArchTargetFeatures(const Driver
&D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
-ArchName = A->getValue();
+ const Arg *MArch = Args.getLastArg(options
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@@ -135,8 +135,13 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
+ if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
ArchName
https://github.com/SixWeining commented:
Could you add the`ual` feature in another PR? Thanks.
https://github.com/llvm/llvm-project/pull/115832
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@@ -135,8 +135,13 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
+ if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
ArchName
https://github.com/SixWeining edited
https://github.com/llvm/llvm-project/pull/115832
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114513
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https://github.com/SixWeining approved this pull request.
LGTM. Thanks.
https://github.com/llvm/llvm-project/pull/114513
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114512
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https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/114512
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SixWeining wrote:
> > Is it the time to remove the FIXME in those tests?
>
> There are several random inconsistencies and I separated the fixes into
> multiple PRs as suggested by Xuerui. The FIXME is removed in #114513.
Oh, I missed those PRs.
https://github.com/llvm/llvm-project/pull/114511
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https://github.com/llvm/llvm-project/pull/114511
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https://github.com/SixWeining commented:
Is it the time to remove the FIXME in those tests?
https://github.com/llvm/llvm-project/pull/114511
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114510
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https://github.com/SixWeining approved this pull request.
LGTM. Thanks.
https://github.com/llvm/llvm-project/pull/114510
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https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/114509
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https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/114509
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@@ -357,7 +357,7 @@ TARGET_BUILTIN(__builtin_lasx_xvmskltz_w, "V8iV8i", "nc",
"lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskltz_d, "V4LLiV4LLi", "nc", "lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskgez_b, "V32ScV32Sc", "nc", "lasx")
-TARGET_BUILTIN(__builtin_lasx_xvmsknz_b, "V16sV16
@@ -357,7 +357,7 @@ TARGET_BUILTIN(__builtin_lasx_xvmskltz_w, "V8iV8i", "nc",
"lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskltz_d, "V4LLiV4LLi", "nc", "lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskgez_b, "V32ScV32Sc", "nc", "lasx")
-TARGET_BUILTIN(__builtin_lasx_xvmsknz_b, "V16sV16
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