r369093 - [RISCV] Add inline asm constraint A for RISC-V

Author: lewis-revill Date: Fri Aug 16 03:23:56 2019 New Revision: 369093 URL: http://llvm.org/viewvc/llvm-project?rev=369093&view=rev Log: [RISCV] Add inline asm constraint A for RISC-V This allows the constraint A to be used in inline asm for RISC-V, which allows an address held in a register to

r363776 - [RISCV] Mark TLS as supported

Author: lewis-revill Date: Wed Jun 19 01:53:46 2019 New Revision: 363776 URL: http://llvm.org/viewvc/llvm-project?rev=363776&view=rev Log: [RISCV] Mark TLS as supported Inform Clang that TLS is implemented by LLVM for RISC-V Differential Revision: https://reviews.llvm.org/D57055 Modified:

r363056 - [RISCV][NFC] Add missing test files for D54091

Author: lewis-revill Date: Tue Jun 11 05:49:15 2019 New Revision: 363056 URL: http://llvm.org/viewvc/llvm-project?rev=363056&view=rev Log: [RISCV][NFC] Add missing test files for D54091 Added: cfe/trunk/test/CodeGen/riscv-inline-asm.c cfe/trunk/test/Sema/inline-asm-validate-riscv.c Added

r363055 - [RISCV] Add inline asm constraints I, J & K for RISC-V

Author: lewis-revill Date: Tue Jun 11 05:44:01 2019 New Revision: 363055 URL: http://llvm.org/viewvc/llvm-project?rev=363055&view=rev Log: [RISCV] Add inline asm constraints I, J & K for RISC-V This allows the constraints I, J & K to be used in inline asm for RISC-V, with the following semantics