krzysz00 added a comment.
From a quick skim of the backtrace, I think this comes down to the fact that
there isn't a defined way to stick a `p7` into registers (or, equivalently,
there's no `MVT::i160`) and that getting said pointers to that point was
supposed to never happen (in that they were
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entries for buf
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entries for buff
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Closed by commit rGf9c1ede2543b: [AMDGPU] Define data layout entries for
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krzysz00 updated this revision to Diff 518843.
krzysz00 added a comment.
Rebase to handle new legalization tests.
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krzysz00 updated this revision to Diff 516953.
krzysz00 edited the summary of this revision.
krzysz00 added a comment.
Make address space 8 non-integral as well because that's a good idea and we'll
have an address space cast intrinsic.
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krzysz00 updated this revision to Diff 514232.
krzysz00 added a comment.
Fix new merge conflicts
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krzysz00 updated this revision to Diff 512488.
krzysz00 added a comment.
Rebase, since we have addrspace 128
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krzysz00 updated this revision to Diff 510848.
krzysz00 added a comment.
Rebase data layout changes
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krzysz00 updated this revision to Diff 510056.
krzysz00 edited the summary of this revision.
krzysz00 added a comment.
Per discussion on the s.buffer.load revision, don't make those changes, and so
revert this patch back to what it used to be.
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krzysz00 updated this revision to Diff 509761.
krzysz00 edited the summary of this revision.
krzysz00 added a comment.
Rebase for splitting s.buffer.load effect change into earlier patch
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htt
krzysz00 updated this revision to Diff 507870.
krzysz00 added a comment.
... actually fix the typo
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krzysz00 updated this revision to Diff 507869.
krzysz00 added a comment.
Fix typo, rebase while making next patch
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krzysz00 added a comment.
@foad I was trying to avoid sending in one mega-patch that has the entire
prototype.
As to your comments:
- Why 256-bit alignment? It's the next power of 2, and using an alignment that
isn't a power of 2 causes an assertion failure
- Re not being allowed to use addres
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krzysz00 added a reviewer: piotr.
krzysz00 added a comment.
Discussion related to this is also happening over at
https://reviews.llvm.org/D143945 .
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___
krzysz00 updated this revision to Diff 496515.
krzysz00 added a comment.
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Apparently clang has its own copy of this data layout.
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Closed by commit rG5d8da5a208e6: Add missing cases to clang switch after
D141863 (aut
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Turns out there's a switch on APFloat semantics in clang I wasn't
aware of, fix the build error here.
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I think we have dueling patches that we should reconcile. I've put together
https://reviews.llvm.org/D141863 to do the same thing. (it's just now posted
because we were waiting to talk to y'all over at GraphCore to finalize naming,
etc.
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krzysz00 added a comment.
Worked around elsewhere, more permanent fix pending, abandoning
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krzysz00 added a comment.
Having checked with other folks more familiar with the context of our project,
it looks like we might actually be fine using lld as a subprocess, since we'll
always be sitting on top of a ROCm installation, which includes lld, and since
"take this object file and wrap
krzysz00 added a comment.
(Since it looks like the discussion moved here) @MaskRay We can't spawn lld as
a subprocess due to customer requirements around having the kernel
generator/compiler delivered as a static library in some cases. (And there's
LLVM version compatibility concerns, but those
krzysz00 added a comment.
@aganea Can we expect fixes for both the issues with this revision (the
HIP-on-Windows problems noted last night and the MLIR breakage) shortly or
should we revert while y'all work out fixes?
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