[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-11-04 Thread Keith Packard via cfe-commits
@@ -238,7 +236,8 @@ END_COMPILERRT_OUTLINE_FUNCTION(__arm_sc_memcpy) DEFINE_COMPILERRT_FUNCTION_ALIAS(__arm_sc_memmove, __arm_sc_memcpy) - +// This version uses FP registers. Use this only on targets with them +#if defined(__aarch64__) && __ARM_FP != 0 keith-

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-11-04 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/111235 >From 7002f226e15145c3791cc5587f2397bed8f362a4 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 4 Oct 2024 21:06:37 -0700 Subject: [PATCH 1/2] [libunwind] Support aarch64 without FPU Skip save/rest

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-10 Thread Keith Packard via cfe-commits
@@ -238,7 +236,8 @@ END_COMPILERRT_OUTLINE_FUNCTION(__arm_sc_memcpy) DEFINE_COMPILERRT_FUNCTION_ALIAS(__arm_sc_memmove, __arm_sc_memcpy) - +// This version uses FP registers. Use this only on targets with them +#if defined(__aarch64__) && __ARM_FP != 0 keith-

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-09 Thread Keith Packard via cfe-commits
https://github.com/keith-packard edited https://github.com/llvm/llvm-project/pull/111235 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-09 Thread Keith Packard via cfe-commits
@@ -238,6 +236,7 @@ END_COMPILERRT_OUTLINE_FUNCTION(__arm_sc_memcpy) DEFINE_COMPILERRT_FUNCTION_ALIAS(__arm_sc_memmove, __arm_sc_memcpy) +#if defined(__aarch64__) && __ARM_FP != 0 keith-packard wrote: Good plan. I've stuck a comment in both .c and .S files a

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-09 Thread Keith Packard via cfe-commits
@@ -1,5 +1,20 @@ #include +#if __ARM_FP == 0 +// WARNING: When building the scalar versions of these functions you need to +// use the compiler flag "-mllvm -disable-loop-idiom-all" to prevent clang keith-packard wrote: I just checked -- the CMakeLists.txt fi

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-09 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/111235 >From 08ed820b2bc6235998e47c49eb3029b7945b5fec Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 4 Oct 2024 21:06:37 -0700 Subject: [PATCH 1/2] [libunwind] Support aarch64 without FPU Skip save/rest

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
keith-packard wrote: > With [my series to fix > `arch/powerpc`](https://git.kernel.org/pub/scm/linux/kernel/git/nathan/linux.git/log/?h=b4/powerpc-fix-stackprotector-test-clang) > for this implementation applied to Linux, `CONFIG_HAVE_STACKPROTECTOR` is > properly set and the Linux kernel dump

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From ad3d5b03886aa7939d67aef10e31734db7c43834 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Sun, 6 Oct 2024 23:19:30 -0700 Subject: [PATCH 1/5] [CodeGen] Provide Module to useLoadStackGuardNode Use

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-07 Thread Keith Packard via cfe-commits
@@ -6,7 +6,7 @@ #include "../assembly.h" -#ifdef __aarch64__ +#if defined(__aarch64__) && __ARM_FP != 0 keith-packard wrote: Yeah, I've updated the patch after adapting some tests to make sure these all work on non-FPU hardware. That leaves only `__arm_sc_m

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/111235 >From 08ed820b2bc6235998e47c49eb3029b7945b5fec Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 4 Oct 2024 21:06:37 -0700 Subject: [PATCH 1/2] [libunwind] Support aarch64 without FPU Skip save/rest

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-07 Thread Keith Packard via cfe-commits
@@ -633,6 +633,13 @@ Lnovec: .arch_extension gcs #endif +#if defined(__ARM_FP) && __ARM_FP != 0 +#define LDP(a,b,r,o,p) stp a, b, [r, o] +#else +/* In reverse order so that the last LDP(x0,x1,x0) works. */ +#define LDP(a,b,r,o,p) ldr b, [r, p] ; ldr a, [r, o]

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/111235 >From f0546a52bc25327007f75e7267654a858637a76d Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 4 Oct 2024 21:06:37 -0700 Subject: [PATCH 1/2] Support aarch64 without FPU Skip save/restore of FPU r

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
keith-packard wrote: btw, I'm testing this using Linux from https://git.kernel.org/pub/scm/linux/kernel/git/nathan/linux.git/log/?h=b4/powerpc-fix-stackprotector-test-clang https://github.com/llvm/llvm-project/pull/110928 ___ cfe-commits mailing list

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
@@ -5616,6 +5616,10 @@ class TargetLowering : public TargetLoweringBase { return true; } +protected: + // Simple interface for targets without a Module dependency keith-packard wrote: Yup, that makes things look cleaner. Good idea. https://github.com/

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From ad3d5b03886aa7939d67aef10e31734db7c43834 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Sun, 6 Oct 2024 23:19:30 -0700 Subject: [PATCH 1/5] [CodeGen] Provide Module to useLoadStackGuardNode Use

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
keith-packard wrote: Ok, I think this is a lot closer now -- I'm using the non-deprecated mechanism for generating the canary load instruction, although that required reworking the guard function API a bit. https://github.com/llvm/llvm-project/pull/110928 __

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 6fc295312f31915cb691fb612a290fa245e5f9f6 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Sun, 6 Oct 2024 23:19:30 -0700 Subject: [PATCH 1/5] [CodeGen] Provide Module to useLoadStackGuardNode Use

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-07 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 05c0a80977564496094a55ca0ca0b54b8048a30b Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/5] [PowerPC][ISelLowering] Support -mstack-protector-gua

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-06 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 05c0a80977564496094a55ca0ca0b54b8048a30b Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] [PowerPC][ISelLowering] Support -mstack-protector-gua

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-06 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 34ec006112994e99c27569c8811ee53e4a5c8c63 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] [PowerPC][ISelLowering] Support -mstack-protector-gua

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-05 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/111235 >From 048cb1b0ea65fb758e104376c0bff345eab67623 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 4 Oct 2024 21:06:37 -0700 Subject: [PATCH 1/2] [libunwind] Support aarch64 without FPU ldp and stp in

[compiler-rt] [libunwind] [AArch64] Fix nofp regressions in compiler-rt and libunwind (PR #111235)

2024-10-04 Thread Keith Packard via cfe-commits
https://github.com/keith-packard created https://github.com/llvm/llvm-project/pull/111235 These two libraries don't build for `-march=armv8-a+nofp -mabi=aapcs-soft` as a couple of uses of floating point instructions and registers have crept in. >From 6201bc34f1213e9f8c477421757509c9c4e678ce Mo

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-03 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 3ac025bd12d42b9318edf7aefe1d93a6d06b95bb Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] [PowerPC][ISelLowering] Support -mstack-protector-gua

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-03 Thread Keith Packard via cfe-commits
@@ -3605,7 +3605,8 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, StringRef Value = A->getValue(); if (!EffectiveTriple.isX86() && !EffectiveTriple.isAArch64() && !EffectiveTriple.isARM() && !EffectiveTriple.isThumb() && -!Effecti

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-03 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/110928 >From 74b14206ea2ec0772063ce55440531834a8a0ae7 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] [PowerPC][ISelLowering] Support -mstack-protector-gua

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-10-02 Thread Keith Packard via cfe-commits
keith-packard wrote: > LGTM. I assume you need someone to push it? Yes please! The PowerPC one is waiting in the wings :-) https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)

2024-10-02 Thread Keith Packard via cfe-commits
https://github.com/keith-packard created https://github.com/llvm/llvm-project/pull/110928 Add support for using a thread-local variable with a specified offset for holding the stack guard canary value. This supports both 32- and 64- bit PowerPC targets. This mirrors changes from #108942 but t

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-10-02 Thread Keith Packard via cfe-commits
keith-packard wrote: I've retitled the commit messages to match llvm conventions and added a clean-up to replace another instance of `getParent()->getParent()` with `getModule()`. https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits maili

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-10-02 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From f91cf985d10a07af617b6098f50d023108d060a4 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Wed, 2 Oct 2024 12:37:30 -0700 Subject: [PATCH 1/5] [RISCV][ISelLowering] Use getModule() instead of getPa

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-10-02 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 1ca3c96bc0e07a2fdae982736017f1d31147e4e4 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,47 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=riscv64-unknown-elf -verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +define void @foo(i64 %t) sspstrong { keith-pa

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,47 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=riscv64-unknown-elf -verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +define void @foo(i64 %t) sspstrong { keith-pa

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,47 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=riscv64-unknown-elf -verify-machineinstrs < %s \ keith-packard wrote: I kinda wondered -- the existing tests are all over t

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
keith-packard wrote: yup, all fixes mirrored over there. Thanks for your careful review! https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs < %s | \ +; RUN: FileCheck %s + +target triple = "riscv64-unknown-linux-gnu" + +define dso_local void @foo(i64 %t) local_unnamed

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs < %s | \ +; RUN: FileCheck %s + +target triple = "riscv64-unknown-linux-gnu" + +define dso_local void @foo(i64 %t) local_unnamed

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs < %s | \ +; RUN: FileCheck %s keith-packard wrote: Thanks. After moving the triple into the RUN line, it's lon

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs < %s | \ +; RUN: FileCheck %s + +target triple = "riscv64-unknown-linux-gnu" + +define dso_local void @foo(i64 %t) local_unnamed

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs < %s | \ +; RUN: FileCheck %s + +target triple = "riscv64-unknown-linux-gnu" keith-packard wrote: sorry, copie

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
keith-packard wrote: > LGTM Thanks so much for all the review and help here; really appreciate it. https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -3644,13 +3645,28 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value << "sysreg global"; return; } +if (EffectiveTriple.isRISCV()) { + if (Value != "tls" && Value != "global") { ---

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/4] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -21228,6 +21228,14 @@ Value *RISCVTargetLowering::getIRStackGuard(IRBuilderBase &IRB) const { if (Subtarget.isTargetAndroid()) return useTpOffset(IRB, -0x18); + Module *M = IRB.GetInsertBlock()->getParent()->getParent(); keith-packard wrote: Yup, g

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 156b989feea26694b291cde9be637947be9aca67 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/3] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
@@ -21228,6 +21228,14 @@ Value *RISCVTargetLowering::getIRStackGuard(IRBuilderBase &IRB) const { if (Subtarget.isTargetAndroid()) return useTpOffset(IRB, -0x18); + Module *M = IRB.GetInsertBlock()->getParent()->getParent(); keith-packard wrote: Thanks

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-23 Thread Keith Packard via cfe-commits
https://github.com/keith-packard edited https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-22 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From 60ad4f7793701bc50d1c65db4fe665558678fd7b Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/3] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-22 Thread Keith Packard via cfe-commits
@@ -3644,13 +3645,28 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value << "sysreg global"; return; } +if (EffectiveTriple.isRISCV()) { + if (Value != "tls" && Value != "global") { ---

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-22 Thread Keith Packard via cfe-commits
@@ -3681,6 +3698,11 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, D.Diag(diag::err_drv_invalid_value) << A->getOption().getName() << Value; return; } +if (EffectiveTriple.isRISCV() && Value != "tp") { + D.Diag(diag::err_drv_inva

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-22 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From a295c6d8057ddd712097e3bf659cdbe3bb4ec869 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/3] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-22 Thread Keith Packard via cfe-commits
@@ -0,0 +1,19 @@ +; RUN: llc -mtriple=riscv64-unknown-elf < %s | \ keith-packard wrote: Thanks. I wondered how that was supposed to work. https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cf

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-19 Thread Keith Packard via cfe-commits
@@ -3664,12 +3680,18 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value; return; } +if (EffectiveTriple.isRISCV() && (Offset <= -2048 || Offset >= 2048)) { keith-packard wrote: Do

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-19 Thread Keith Packard via cfe-commits
@@ -3644,13 +3645,28 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value << "sysreg global"; return; } +if (EffectiveTriple.isRISCV()) { + if (Value != "tls" && Value != "global") { +D.

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-19 Thread Keith Packard via cfe-commits
@@ -3644,13 +3645,28 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value << "sysreg global"; return; } +if (EffectiveTriple.isRISCV()) { + if (Value != "tls" && Value != "global") { ---

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-19 Thread Keith Packard via cfe-commits
https://github.com/keith-packard updated https://github.com/llvm/llvm-project/pull/108942 >From a295c6d8057ddd712097e3bf659cdbe3bb4ec869 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 16 Sep 2024 15:41:38 +0200 Subject: [PATCH 1/3] riscv: Support -mstack-protector-guard=tls Add suppor

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-18 Thread Keith Packard via cfe-commits
@@ -3664,12 +3680,18 @@ static void RenderSSPOptions(const Driver &D, const ToolChain &TC, << A->getOption().getName() << Value; return; } +if (EffectiveTriple.isRISCV() && (Offset <= -2048 || Offset >= 2048)) { keith-packard wrote: Ye

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-18 Thread Keith Packard via cfe-commits
https://github.com/keith-packard edited https://github.com/llvm/llvm-project/pull/108942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] riscv: Support -mstack-protector-guard=tls (PR #108942)

2024-09-17 Thread Keith Packard via cfe-commits
https://github.com/keith-packard created https://github.com/llvm/llvm-project/pull/108942 Add support for using a thread-local variable with a specified offsetfor holding the stack guard canary value. >From 7822a1ee2eed923a3014577668bdd8f1c8145d4c Mon Sep 17 00:00:00 2001 From: Keith Packard