[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: > but won't merge them until they are ratified just like Zvzip/Zvabd/Zibimm I think this patch is supported to be the vendor instruction set of `SiFive Xsfmm* Attached Matrix Extensions` if I understand correctly of this PR. AME is another issue that we don’t have ratified AM

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: > SiFive's AME proposal locates in OP-V/OP-VE category Yes, this is a good point. I do think we should also remove other vendor instruction sets which abused the standard op fields. https://github.com/llvm/llvm-project/pull/133031 _

[clang] [llvm] [RISCV] Add MC layer support for XSfmm*. (PR #133031)

sequencer wrote: Thanks for the tests on the `rv32i`! https://github.com/llvm/llvm-project/pull/133031 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV][WIP] Add assembler support for Zvma (PR #132965)

sequencer wrote: Appreciate your work! https://github.com/llvm/llvm-project/pull/132965 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits