@@ -498,12 +498,17 @@ Expected clang(ArrayRef InputFiles,
const ArgList &Args) {
};
// Forward all of the `--offload-opt` and similar options to the device.
- CmdArgs.push_back("-flto");
for (auto &Arg : Args.filtered(OPT_offload_opt_eq_minus, OPT_mllvm))
CmdArgs
https://github.com/jchlanda approved this pull request.
https://github.com/llvm/llvm-project/pull/125243
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jchlanda wrote:
> In principle I am against this, it adds a relatively brittle hook, and
> bypasses the pre-existing mechanisms (use CL2 or enable the generic-as
> extension) for obtaining this behaviour, in a way that does not ensure that
> the pre-existing mechanisms are available (e.g. it a
https://github.com/jchlanda closed
https://github.com/llvm/llvm-project/pull/117588
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https://github.com/llvm/llvm-project/pull/117588
`opencl-def-is-generic-addrspace` sets the default address space from private
to generic. This feature allows for building bitcode libraries written in
OpenCL that can then be linked against modules compiled f
https://github.com/jchlanda closed
https://github.com/llvm/llvm-project/pull/97028
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>From 74eb15f035e4aed1dd19b735ac0b2fc5ad172213 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 28 Jun 2024 09:25:56 +
Subject: [PATCH] [CUDA][NFC] CudaArch to OffloadArch rename
Rename CudaArch to O
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/97028
>From 7424d33961400546dfb142ec220e59bb78fe1c82 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 28 Jun 2024 09:25:56 +
Subject: [PATCH] [CUDA][NFC] CudaArch to OffloadArch rename
Rename CudaArch to O
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/97028
>From 2d61a382fa66d9cc23cd6c78657a6161edf5b5c2 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 28 Jun 2024 09:25:56 +
Subject: [PATCH] [CUDA][NFC] CudaArch to OffloadArch rename
Rename CudaArch to O
@@ -52,7 +52,7 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
-enum class CudaArch {
+enum class GpuArch {
jchlanda wrote:
I've folded the commits to keep it clean.
https://
https://github.com/jchlanda edited
https://github.com/llvm/llvm-project/pull/97028
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https://github.com/llvm/llvm-project/pull/97028
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@@ -52,7 +52,7 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
-enum class CudaArch {
+enum class GpuArch {
jchlanda wrote:
Done.
https://github.com/llvm/llvm-project/pull/97
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/97028
>From aa37f9f9df35c0464850fe95ca339545c5431de8 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 28 Jun 2024 09:25:56 +
Subject: [PATCH] [CUDA][NFC] CudaArch to OffloadArch rename
Rename CudaArch to O
@@ -52,7 +52,7 @@ const char *CudaVersionToString(CudaVersion V);
// Input is "Major.Minor"
CudaVersion CudaStringToVersion(const llvm::Twine &S);
-enum class CudaArch {
+enum class GpuArch {
jchlanda wrote:
Good idea, let me rename it real quick.
https://gi
jchlanda wrote:
This originally was submitted as a ticket against a fork of llvm in here:
https://github.com/intel/llvm/issues/4279
https://github.com/llvm/llvm-project/pull/97028
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https://github.com/jchlanda created
https://github.com/llvm/llvm-project/pull/97028
Rename `CudaArch` to `GpuArch` to better reflect its content and the use.
Apply a similar rename to helpers handling the enum.
>From 24603da293e82cdf2531283fb5f354c805ead1d6 Mon Sep 17 00:00:00 2001
From: Jakub
https://github.com/jchlanda closed
https://github.com/llvm/llvm-project/pull/66993
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https://github.com/jchlanda closed
https://github.com/llvm/llvm-project/pull/67667
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https://github.com/llvm/llvm-project/pull/67667
>From 6d17781780584d5bc123e93e1388e64df0bbd3f9 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Thu, 28 Sep 2023 13:30:27 +0100
Subject: [PATCH] Reland [NVPTX] Add support for maxclusterrank in
launch_bounds
jchlanda wrote:
As discussed in:
https://github.com/llvm/llvm-project/pull/66496#discussion_r134239
https://github.com/llvm/llvm-project/pull/67667
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https://github.com/jchlanda created
https://github.com/llvm/llvm-project/pull/67667
This reverts commit 0afbcb20fd908f8bf9073697423da097be7db592.
>From d8c1372998a74dfbfea921bf049575e5e9c0c5a7 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Thu, 28 Sep 2023 13:30:27 +0100
Subject: [PATCH] R
@@ -10,6 +10,7 @@
//
//===--===//
+#include "../Basic/Targets/NVPTX.h"
jchlanda wrote:
@sam-mccall, apologies for introducing the bug and thank you for drawing my
attention to it.
I've got
https://github.com/jchlanda closed
https://github.com/llvm/llvm-project/pull/66496
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https://github.com/llvm/llvm-project/pull/66496
>From 437c41f418be8a812229acc3573ebba688832ad5 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH] [NVPTX] Add support for maxclusterrank in launch_bounds
Since S
@@ -537,59 +537,46 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const
Function &F,
raw_ostream &O) const {
// If the NVVM IR has some of reqntid* specified, then output
// the reqntid directive, and set the unspec
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/7] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
@@ -5607,6 +5607,21 @@ bool Sema::CheckRegparmAttr(const ParsedAttr &AL,
unsigned &numParams) {
return false;
}
+// Helper to get CudaArch.
+static CudaArch getCudaArch(const TargetInfo &TI) {
jchlanda wrote:
Done in: 3c17966b26a613f3b1a117f992d45b751cbff4
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/6] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -std=c++11 -fsyntax-only -triple nvptx-unknown-unknown
-target-cpu sm_90 -verify %s
+
+#include "Inputs/cuda.h"
+
+__launch_bounds__(128, 7) void Test2Args(void);
+__launch_bounds__(128) void Test1Arg(void);
+
+__launch_bounds__(0x) v
@@ -12,7 +12,7 @@ __launch_bounds__(0x1) void
TestWayTooBigArg(void); // expected-
__launch_bounds__(-128, 7) void TestNegArg1(void); // expected-warning
{{'launch_bounds' attribute parameter 0 is negative and will be ignored}}
__launch_bounds__(128, -7) void T
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/5] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
@@ -537,59 +537,46 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const
Function &F,
raw_ostream &O) const {
// If the NVVM IR has some of reqntid* specified, then output
// the reqntid directive, and set the unspec
@@ -11836,6 +11836,10 @@ def err_sycl_special_type_num_init_method : Error<
"types with 'sycl_special_class' attribute must have one and only one
'__init' "
"method defined">;
+def warn_cuda_maxclusterrank_sm_90 : Warning<
+ "maxclusterrank requires sm_90 or higher, CUDA
@@ -5607,6 +5607,21 @@ bool Sema::CheckRegparmAttr(const ParsedAttr &AL,
unsigned &numParams) {
return false;
}
+// Helper to get CudaArch.
+static CudaArch getCudaArch(const TargetInfo &TI) {
jchlanda wrote:
Is that the kind of thing you had in mind:
```d
https://github.com/jchlanda updated
https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/4] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
https://github.com/jchlanda resolved
https://github.com/llvm/llvm-project/pull/66496
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@@ -5,30 +5,37 @@
#include "llvm/Bitcode/ReaderWriter.h"
#endif
+#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
+#include "llvm/IRReader/IRReader.h"
#inclu
https://github.com/jchlanda resolved
https://github.com/llvm/llvm-project/pull/66496
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https://github.com/jchlanda resolved
https://github.com/llvm/llvm-project/pull/66496
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https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/3] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
@@ -537,59 +537,52 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const
Function &F,
raw_ostream &O) const {
// If the NVVM IR has some of reqntid* specified, then output
// the reqntid directive, and set the unspec
https://github.com/jchlanda resolved
https://github.com/llvm/llvm-project/pull/66496
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https://github.com/llvm/llvm-project/pull/66496
>From 9c8caed3c8def15ccdbfdf831f36d0befed1fc84 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Fri, 15 Sep 2023 12:08:04 +0100
Subject: [PATCH 1/2] [NVPTX] Add support for maxclusterrank in launch_bounds
Sin
@@ -5662,22 +5677,39 @@ Sema::CreateLaunchBoundsAttr(const AttributeCommonInfo
&CI, Expr *MaxThreads,
return nullptr;
}
+ if (MaxBlocks) {
+// Feature '.maxclusterrank' requires .target sm_90 or higher.
+auto SM = getCudaArch(Context.getTargetInfo());
+if
@@ -307,6 +307,14 @@ void CodeGenModule::handleCUDALaunchBoundsAttr(
NVPTXTargetCodeGenInfo::addNVVMMetadata(F, "minctasm",
MinBlocks.getExtValue());
}
+ if (Attr->getMaxBlocks()) {
+llvm::APSInt MaxBlocks(32);
+Max
jchlanda wrote:
A friendly ping.
https://github.com/llvm/llvm-project/pull/66496
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None
>From c37f854eb496937d0eb017b14bd8a9accefdab80 Mon Sep 17 00:00:00 2001
From: Jakub Chlanda
Date: Thu, 21 Sep 2023 10:48:33 +0100
Subject: [PATCH] [LIBCLC] Teach prepare-builtins how to handle text based I
https://github.com/jchlanda created
https://github.com/llvm/llvm-project/pull/66496
Since SM_90 CUDA supports specifying additional argument to the launch_bounds
attribute: maxBlocksPerCluster, to express the maximum number of CTAs that can
be part of the cluster. See:
https://docs.nvidia.com
Author: Jakub Chlanda
Date: 2023-06-02T09:10:19+02:00
New Revision: 3e37c98bdb512425cab91f6cf156cc66d6103b2f
URL:
https://github.com/llvm/llvm-project/commit/3e37c98bdb512425cab91f6cf156cc66d6103b2f
DIFF:
https://github.com/llvm/llvm-project/commit/3e37c98bdb512425cab91f6cf156cc66d6103b2f.diff
Author: Jakub Chlanda
Date: 2023-03-28T08:48:10+02:00
New Revision: ae3c981aa4b85cfae6531ba50df7ad84feebe43c
URL:
https://github.com/llvm/llvm-project/commit/ae3c981aa4b85cfae6531ba50df7ad84feebe43c
DIFF:
https://github.com/llvm/llvm-project/commit/ae3c981aa4b85cfae6531ba50df7ad84feebe43c.diff
Author: Jakub Chlanda
Date: 2023-03-15T08:41:45Z
New Revision: 7258317bade0fd82e257e47b31eee3ad0c6c5305
URL:
https://github.com/llvm/llvm-project/commit/7258317bade0fd82e257e47b31eee3ad0c6c5305
DIFF:
https://github.com/llvm/llvm-project/commit/7258317bade0fd82e257e47b31eee3ad0c6c5305.diff
LOG:
Author: Jakub Chlanda
Date: 2023-03-03T12:49:18+01:00
New Revision: 71b06585857a77691761a7bfd16b5b91454a6894
URL:
https://github.com/llvm/llvm-project/commit/71b06585857a77691761a7bfd16b5b91454a6894
DIFF:
https://github.com/llvm/llvm-project/commit/71b06585857a77691761a7bfd16b5b91454a6894.diff
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