[PATCH] D151876: [NVPTX] Signed char and (unsigned)long overloads of ldg and ldu

This revision was automatically updated to reflect the committed changes. Closed by commit rG3e37c98bdb51: [cuda, NVPTX] Signed char and (unsigned)long builtins of ldg and ldu (authored by jchlanda). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D1518

[PATCH] D151876: [NVPTX] Signed char and (unsigned)long overloads of ldg and ldu

jchlanda added a comment. In D151876#433 , @tra wrote: > I'd change the patch title: > > - `[NVPTX]` -> `[cuda, NVPTX]` as these are clang changes, not NVPTX back-end. > - `overloads ` -> `builtins` Sure, will do. Thank you. Repository: rG LLVM G

[PATCH] D151876: [NVPTX] Signed char and (unsigned)long overloads of ldg and ldu

jchlanda created this revision. jchlanda added a reviewer: tra. Herald added subscribers: mattd, gchakrabarti, asavonic. Herald added a project: All. jchlanda requested review of this revision. Herald added subscribers: cfe-commits, jholewinski. Herald added a project: clang. This is a follow up t

[PATCH] D146715: [NVPTX] Enforce half type support is present for builtins

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGae3c981aa4b8: [NVPTX] Enforce half type support is present for builtins (authored by jchlanda). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D146715: [NVPTX] Enforce half type support is present for builtins

jchlanda marked an inline comment as done. jchlanda added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18313 // of its member: n*alignof(t)." -return MakeLdgLdu(Intrinsic::nvvm_ldg_global_i); - case NVPTX::BI__nvvm_ldg_h: - case NVPTX::BI__nvvm_ldg_h2:

[PATCH] D146715: [NVPTX] Enforce half type support is present for builtins

jchlanda added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18912 + case NVPTX::BI__nvvm_ldu_h2: { +return MakeHalfType(BuiltinID, E, *this); + } tra wrote: > We seem to be checking builtin IDs twice. Once here and then in MakeHalfType > wh

[PATCH] D146715: [NVPTX] Enforce half type support is present for builtins

jchlanda updated this revision to Diff 508046. jchlanda added a comment. Remove duplicated switch over builtins. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146715/new/ https://reviews.llvm.org/D146715 Files: clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-nvptx-nativ

[PATCH] D146715: [NVPTX] Enforce half type support is present for builtins

jchlanda created this revision. jchlanda added a reviewer: tra. Herald added subscribers: mattd, gchakrabarti, asavonic. Herald added a project: All. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jholewinski. Herald added projects: clang, LLVM. Fo

[PATCH] D145238: [NVPTX] Expose LDU builtins

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7258317bade0: [NVPTX] Expose LDU builtins (authored by jchlanda). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda updated this revision to Diff 505394. jchlanda added a comment. Use `CHECK-LABEL`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145238/new/ https://reviews.llvm.org/D145238 Files: clang/include/clang/Basic/BuiltinsNVPTX.def clang/lib

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda marked an inline comment as done. jchlanda added a comment. @tra is there anything else I should do for this patch? Thank you. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145238/new/ https://reviews.llvm.org/D145238

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda marked 5 inline comments as done. jchlanda added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18267-18271 +auto HalfSupport = HasHalfSupport(BuiltinID); +if (!HalfSupport.first) { + CGM.Error(E->getExprLoc(), +HalfSupport.seco

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda updated this revision to Diff 503644. jchlanda added a comment. `append` -> `+` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145238/new/ https://reviews.llvm.org/D145238 Files: clang/include/clang/Basic/BuiltinsNVPTX.def clang/lib/Co

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18267-18271 +auto HalfSupport = HasHalfSupport(BuiltinID); +if (!HalfSupport.first) { + CGM.Error(E->getExprLoc(), +HalfSupport.second.append(" requires native half type supp

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda updated this revision to Diff 503242. jchlanda added a comment. Simplify the check for half tys support. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145238/new/ https://reviews.llvm.org/D145238 Files: clang/include/clang/Basic/Builtin

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:18116 +case NVPTX::BI__nvvm_ldu_h: + BuiltinName = "__nvvm_ldu_h"; + break; tra wrote: > Can we use the standard `StringRef Name = > getContext().BuiltinInfo.getName(Builti

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda updated this revision to Diff 502948. jchlanda marked 3 inline comments as done. jchlanda added a comment. Address PR comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145238/new/ https://reviews.llvm.org/D145238 Files: clang/inclu

[PATCH] D145238: [NVPTX] Expose LDU builtins

jchlanda created this revision. jchlanda added a reviewer: tra. Herald added subscribers: mattd, gchakrabarti, asavonic. Herald added a project: All. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jholewinski. Herald added projects: clang, LLVM. Al

[PATCH] D144961: [NVPTX] Add f16 and v2f16 ldg builtins

This revision was automatically updated to reflect the committed changes. Closed by commit rG71b06585857a: [NVPTX] Add f16 and v2f16 ldg builtins (authored by jchlanda). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144961/new/ https://reviews.llvm.

[PATCH] D144961: [NVPTX] Add f16 and v2f16 ldg builtins

jchlanda added inline comments. Comment at: llvm/test/CodeGen/NVPTX/ldu-ldg.ll:5-6 declare i8 @llvm.nvvm.ldu.global.i.i8.p1(ptr addrspace(1) %ptr, i32 %align) declare i32 @llvm.nvvm.ldu.global.i.i32.p1(ptr addrspace(1) %ptr, i32 %align) + tra wrote: > Do we w

[PATCH] D144961: [NVPTX] Add f16 and v2f16 ldg builtins

jchlanda updated this revision to Diff 501392. jchlanda added a comment. Add more verbose test names. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144961/new/ https://reviews.llvm.org/D144961 Files: clang/include/clang/Basic/BuiltinsNVPTX.def clang/lib/CodeGen/CGBuiltin.cpp clan

[PATCH] D144961: [NVPTX] Add f16 and v2f16 ldg builtins

jchlanda created this revision. jchlanda added a reviewer: tra. Herald added subscribers: mattd, gchakrabarti, asavonic. Herald added a project: All. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jholewinski. Herald added projects: clang, LLVM. Ad

[PATCH] D136311: [CUDA,NVPTX] Implement __bf16 support for NVPTX.

jchlanda accepted this revision. jchlanda added a comment. This revision is now accepted and ready to land. Looks good. Comment at: llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp:838 } } +static int getLdStRegType(EVT VT) { New line here. Co

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added inline comments. Comment at: clang/include/clang/AST/Type.h:486 + bool IsSYCLOrOpenCL = false) { +if (ASMap) { + bool IsATargetAS = false; jchlanda wrote: > tra wrote: > > If A and B are both target AS

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda updated this revision to Diff 429956. jchlanda edited the summary of this revision. jchlanda added a reviewer: Anastasia. jchlanda added a comment. Herald added a subscriber: kosarev. Use helper functions when handling address space values. Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added inline comments. Comment at: clang/include/clang/AST/Type.h:486 + bool IsSYCLOrOpenCL = false) { +if (ASMap) { + bool IsATargetAS = false; tra wrote: > If A and B are both target AS, we fall through to

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added a comment. In D124382#3480600 , @Anastasia wrote: > > And I think we could add this feature in a very light way for example by > reserving the numbers from the clang `LangAS` enum to be used with the > language address spaces in the p

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added a comment. @Anastasia @tra apologies for a late reply, I'm catching up with the thread after holidays. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124382/new/ https://reviews.llvm.org/D124382 _

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added a comment. In D124382#3472888 , @Anastasia wrote: > > Can you provide an example of where it could be useful? Note that I feel that > such functionality could be implemented on top of full implementation of > target specific address spa

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda added a comment. @tra @Naghasan @t4c1 you might find it interesting, a follow up from the discussion here: https://reviews.llvm.org/D112718 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124382/new/ https://reviews.llvm.org/D124382 __

[PATCH] D124382: [Clang] Recognize target address space in superset calculation

jchlanda created this revision. Herald added subscribers: kerbowa, Anastasia, jvesely. Herald added a project: All. jchlanda requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Use target's address space map to handle cases when both language a

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda added a comment. Herald added a project: All. In D117887#3352079 , @tra wrote: > In D117887#3351257 , @jchlanda > wrote: > >> @tra thank you for landing the patches, it seems that the clang part >> (bui

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda marked an inline comment as done. jchlanda added a comment. @tra thank you for landing the patches, it seems that the clang part (builtin declarations and tests) have been dropped, only `llvm` dir changes made it through. Is there any way I could fix it (same goes for the other two patc

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda added a comment. @tra I've fixed the test failure (`math-intrins.ll`) the rest seems to be unrelated timeouts, would you be able to merge those patches in, as I don't have the commit access please? The same goes for https://reviews.llvm.org/D117887 and https://reviews.llvm.org/D119157

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda updated this revision to Diff 407904. jchlanda added a comment. PTX/sm version tidy up. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118977/new/ https://reviews.llvm.org/D118977 Files: clang/include/clang/Basic/BuiltinsNVPTX.def clan

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda marked 2 inline comments as done. jchlanda added inline comments. Comment at: llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp:162 SimplifyAction(Instruction::BinaryOps BinaryOp, FtzRequirementTy FtzReq) : BinaryOp(BinaryOp), FtzRequirement(FtzReq) {} -

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda added inline comments. Comment at: llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp:162 SimplifyAction(Instruction::BinaryOps BinaryOp, FtzRequirementTy FtzReq) : BinaryOp(BinaryOp), FtzRequirement(FtzReq) {} tra wrote: > The new 3-argu

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda added inline comments. Comment at: llvm/lib/Target/NVPTX/NVPTXIntrinsics.td:937 +class FMA_TUPLE Preds = [hasPTX70, hasSM80]> { + string Variant = V; tra wrote: > I think the default should be the most useful/common and the least > surprising value. >

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda updated this revision to Diff 407078. jchlanda added a comment. Tidy up FMA_TUPLE class. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118977/new/ https://reviews.llvm.org/D118977 Files: clang/include/clang/Basic/BuiltinsNVPTX.def cla

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda added a comment. In D118977#3302158 , @tra wrote: > In D118977#3299974 , @jchlanda > wrote: > >>> Target ISA Notes >>> Requires sm_53 or higher. > > I think we do need this constraint applied to the new

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda updated this revision to Diff 406851. jchlanda added a comment. Add sm/ptx version guard to f16{x2} builtins. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118977/new/ https://reviews.llvm.org/D118977 Files: clang/include/clang/Basic/Bu

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda added a comment. In D118977#3297465 , @tra wrote: >> They all require PTX 7.0, SM_80. > > According to > https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#half-precision-floating-point-instructions-fma > only `fma.relu` and `bf1

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda updated this revision to Diff 406322. jchlanda added a comment. Set correct SM and PTX version. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118977/new/ https://reviews.llvm.org/D118977 Files: clang/include/clang/Basic/BuiltinsNVPTX.de

[PATCH] D118977: [NVPTX] Add more FMA intriniscs/builtins

jchlanda created this revision. jchlanda added reviewers: tra, csigg, bkramer. Herald added subscribers: asavonic, hiraditya, jholewinski. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jdoerfert. Herald added projects: clang, LLVM. This patch adds

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda marked 2 inline comments as done. jchlanda added inline comments. Comment at: clang/test/CodeGen/builtins-nvptx.c:822 + // CHECK_PTX70_SM80: call i16 @llvm.nvvm.fmin.bf16 + __nvvm_fmin_bf16(0x1234, 0x7FBF); + // CHECK_PTX70_SM80: call i16 @llvm.nvvm.fmin.nan.bf16

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda added a comment. In D117887#3262024 , @tra wrote: > > Please do check that the generated PTX does get assembled by ptxas. `ptxas` is happy with asm generated from both `math-intrins-sm86-ptx72.ll` and `math-intrins-sm80-ptx70.ll` Reposito

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda updated this revision to Diff 405161. jchlanda edited the summary of this revision. jchlanda added a comment. Added xorsign.abs variant and test. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117887/new/ https://reviews.llvm.org/D117887 F

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda added a comment. In D117887#3262024 , @tra wrote: > > If you only intended to add instructions available in PTX-7.0, which, based > on the constraints used in the patch, appears to be the case, I'd mention > that in the commit log. Yeap, w

[PATCH] D117887: [NVPTX] Expose float tys min, max, abs, neg as builtins

jchlanda created this revision. jchlanda added reviewers: csigg, tra, bkramer. Herald added subscribers: asavonic, hiraditya, jholewinski. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jdoerfert. Herald added projects: clang, LLVM. Adds support fo

[PATCH] D117787: [NVPTX] abs, neg, min, max intrinsics for half types

jchlanda abandoned this revision. jchlanda added a comment. I need to update this to the upstream, as it was based on intel's fork. Abandoning for now. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117787/new/ https://reviews.llvm.org/D117787 ___

[PATCH] D117787: [NVPTX] abs, neg, min, max intrinsics for half types

jchlanda created this revision. jchlanda added reviewers: jholewinski, steffenlarsen, asavonic, sebastian-ne. Herald added a subscriber: hiraditya. jchlanda requested review of this revision. Herald added subscribers: llvm-commits, cfe-commits, jdoerfert. Herald added projects: clang, LLVM. This p